arch/riscv: semantic ESF printer

Present ESF registers as columns of argument registers and temporary
registers. Also print 64-bit values in full width.

It now looks like this:

E:  mcause: 2, Illegal instruction
E:      a0: 00000000    t0: 12345678
E:      a1: 00000000    t1: 00000000
E:      a2: 00000000    t2: 00000000
E:      a3: 00000000    t3: 0badc0de
E:      a4: 00000000    t4: 00000000
E:      a5: 8000733c    t5: deadbeef
E:      a6: 00000000    t6: 00000000
E:      a7: 00000000
E:                      tp: 00000000
E:      ra: 80000d9a    gp: 00000000
E:    mepc: 8000733c
E: mstatus: 00001880

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>