Commit 9d830894 authored by Khanh Nguyen's avatar Khanh Nguyen Committed by Henrik Brix Andersen
Browse files

boards: renesas: Enable CEU video capture support on EK-RA8D1 



- Add CEU pin configuration to ek_ra8d1-pinctrl.dtsi
- Enable CEU node and Arducam 20-pin connector in ek_ra8d1.dts
- Configure PWM3 as external XCLK via pwm-clock node
- Update board YAML to declare video support

Signed-off-by: default avatarDuy Vo <duy.vo.xc@bp.renesas.com>
Signed-off-by: default avatarKhanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
parent df0bbeb3

boards/renesas/ek_ra8d1/ek_ra8d1-pinctrl.dtsi

+31 −0
Original line number Diff line number Diff line
@@ -57,6 +57,19 @@ 
		};

	};



	pwm3_default: pwm3_default {

		group1 {

			/* GTIOC3A */

			psels = <RA_PSEL(RA_PSEL_GPT1, 4, 3)>;

			drive-strength = "medium";

		};

		group2 {

			/* GTIOC3B */

			psels = <RA_PSEL(RA_PSEL_GPT1, 4, 4)>;

			drive-strength = "medium";

		};

	};



	pwm7_default: pwm7_default {

		group1 {

			/* GTIOC7A */
@@ -269,4 +282,22 @@ 
			drive-strength = "high";

		};

	};



	ceu_default: ceu_default {

		group1 {

			/* CEU */

			psels = <RA_PSEL(RA_PSEL_CEU, 4, 0)>, /* VIO_D0 */

				<RA_PSEL(RA_PSEL_CEU, 4, 1)>, /* VIO_D1 */

				<RA_PSEL(RA_PSEL_CEU, 4, 5)>, /* VIO_D2 */

				<RA_PSEL(RA_PSEL_CEU, 4, 6)>, /* VIO_D3 */

				<RA_PSEL(RA_PSEL_CEU, 7, 0)>, /* VIO_D4 */

				<RA_PSEL(RA_PSEL_CEU, 7, 1)>, /* VIO_D5 */

				<RA_PSEL(RA_PSEL_CEU, 7, 2)>, /* VIO_D6 */

				<RA_PSEL(RA_PSEL_CEU, 7, 3)>, /* VIO_D7 */

				<RA_PSEL(RA_PSEL_CEU, 7, 8)>, /* VIO_CLK */

				<RA_PSEL(RA_PSEL_CEU, 7, 9)>, /* VIO_HD */

				<RA_PSEL(RA_PSEL_CEU, 7, 10)>; /* VIO_VD */

			drive-strength = "high";

		};

	};

};

boards/renesas/ek_ra8d1/ek_ra8d1.dts

+40 −0
Original line number Diff line number Diff line
@@ -12,6 +12,8 @@ 
#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>

#include <zephyr/dt-bindings/memory-controller/renesas,ra-sdram.h>

#include <zephyr/dt-bindings/adc/adc.h>

#include <zephyr/dt-bindings/gpio/dvp-20pin-connector.h>

#include <zephyr/dt-bindings/pwm/pwm.h>

#include "ek_ra8d1-pinctrl.dtsi"



/ {
@@ -119,6 +121,15 @@ 
			   <6 0 &ioporta 1 0>;  /* DISP_RST */

	};



	dvp_20pin_connector: dvp-20pin-connector {

		compatible = "arducam,dvp-20pin-connector";

		#gpio-cells = <2>;

		gpio-map-mask = <0xffffffff 0xffffffc0>;

		gpio-map-pass-thru = <0x0 0x3f>;

		gpio-map = <DVP_20PIN_PEN 0 &ioport7 4 0>,

			   <DVP_20PIN_PDN 0 &ioport7 5 0>;

	};



	aliases {

		led0 = &led1;

		sw0 = &button0;
@@ -313,6 +324,21 @@ 
	};

};



&pwm3 {

	pinctrl-0 = <&pwm3_default>;

	pinctrl-names = "default";

	interrupts = <51 12>, <52 12>;

	interrupt-names = "gtioca", "overflow";



	cam_clock: pwmclock {

		compatible = "pwm-clock";

		status = "disabled";

		#clock-cells = <1>;

		clock-frequency = <24000000>;

		pwms = <&pwm3 0 PWM_KHZ(24000) PWM_POLARITY_NORMAL>;

	};

};



&pwm7 {

	pinctrl-0 = <&pwm7_default>;

	interrupts = <40 1>, <41 1>;
@@ -419,6 +445,16 @@ 
	};

};



&ceu {

	pinctrl-0 = <&ceu_default>;

	pinctrl-names = "default";

	interrupts = <53 12>;

	interrupt-names = "ceui";

	clocks = <&pclka MSTPC 16>, <&cam_clock 0>;

	clock-names = "pclk", "cam-xclk";

	burst-transfer = <256>;

};



zephyr_lcdif: &lcdif {};



zephyr_mipi_dsi: &mipi_dsi {};
@@ -427,6 +463,10 @@ renesas_mipi_i2c: &iic1 {}; 


pmod_sd_shield: &sdhc1 {};



dvp_20pin_i2c: &iic1 {};



dvp_20pin_interface: &ceu {};



&usbfs {

	pinctrl-0 = <&usbfs_default>;

	pinctrl-names = "default";

boards/renesas/ek_ra8d1/ek_ra8d1.yaml

+1 −0
Original line number Diff line number Diff line
@@ -16,4 +16,5 @@ supported: 
  - counter

  - i2s

  - i3c

  - video

vendor: renesas

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