Commit 9b32f02a authored by James Smith's avatar James Smith Committed by Chris Friedt
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soc: silabs: Add support for MG22 SoCs

Adds SoC definitions and DTS files for SiLabs EFR32MG22 SoCs

Signed-off-by: default avatarJames Smith <james@loopj.com>
parent 93620efc
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+14 −0
Changes for dts/arm/silabs/xg22/efr32mg22.dtsi: 14 added lines, 0 removed lines.
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/*
 * Copyright (c) 2025 Silicon Laboratories Inc.
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <silabs/xg22/efr32xg22.dtsi>

&radio {
	bt_hci_silabs: bt_hci_silabs {
		compatible = "silabs,bt-hci-efr32";
		status = "disabled";
	};
};
+25 −0
Changes for dts/arm/silabs/xg22/efr32mg22c224f512gn32.dtsi: 25 added lines, 0 removed lines.
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/*
 * Copyright (c) 2021 Sateesh Kotapati
 * Copyright (c) 2025 Silicon Laboratories Inc.
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <silabs/xg22/efr32mg22.dtsi>
#include <mem.h>

/ {
	soc {
		compatible = "silabs,efr32mg22c224f512gn32", "silabs,efr32mg22", "silabs,xg22",
			     "silabs,efr32", "simple-bus";
		model = "Silicon Labs EFR32MG22C224F512GN32 SoC";
	};
};

&flash0 {
	reg = <0x0 DT_SIZE_K(512)>;
};

&sram0 {
	reg = <0x20000000 DT_SIZE_K(32)>;
};
+25 −0
Changes for dts/arm/silabs/xg22/efr32mg22c224f512im32.dtsi: 25 added lines, 0 removed lines.
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/*
 * Copyright (c) 2021 Sateesh Kotapati
 * Copyright (c) 2025 Silicon Laboratories Inc.
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <silabs/xg22/efr32mg22.dtsi>
#include <mem.h>

/ {
	soc {
		compatible = "silabs,efr32mg22c224f512im32", "silabs,efr32mg22", "silabs,xg22",
			     "silabs,efr32", "simple-bus";
		model = "Silicon Labs EFR32MG22C224F512IM32 SoC";
	};
};

&flash0 {
	reg = <0x0 DT_SIZE_K(512)>;
};

&sram0 {
	reg = <0x20000000 DT_SIZE_K(32)>;
};
+25 −0
Changes for dts/arm/silabs/xg22/efr32mg22c224f512im40.dtsi: 25 added lines, 0 removed lines.
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/*
 * Copyright (c) 2021 Sateesh Kotapati
 * Copyright (c) 2025 Silicon Laboratories Inc.
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <silabs/xg22/efr32mg22.dtsi>
#include <mem.h>

/ {
	soc {
		compatible = "silabs,efr32mg22c224f512im40", "silabs,efr32mg22", "silabs,xg22",
			     "silabs,efr32", "simple-bus";
		model = "Silicon Labs EFR32MG22C224F512IM40 SoC";
	};
};

&flash0 {
	reg = <0x0 DT_SIZE_K(512)>;
};

&sram0 {
	reg = <0x20000000 DT_SIZE_K(32)>;
};
+25 −0
Changes for dts/arm/silabs/xg22/efr32mg22e224f512im32.dtsi: 25 added lines, 0 removed lines.
Original line number Diff line number Diff line
/*
 * Copyright (c) 2021 Sateesh Kotapati
 * Copyright (c) 2025 Silicon Laboratories Inc.
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <silabs/xg22/efr32mg22.dtsi>
#include <mem.h>

/ {
	soc {
		compatible = "silabs,efr32mg22e224f512im32", "silabs,efr32mg22", "silabs,xg22",
			     "silabs,efr32", "simple-bus";
		model = "Silicon Labs EFR32MG22E224F512IM32 SoC";
	};
};

&flash0 {
	reg = <0x0 DT_SIZE_K(512)>;
};

&sram0 {
	reg = <0x20000000 DT_SIZE_K(32)>;
};
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