Commit 9a893202 authored by Armando Visconti's avatar Armando Visconti Committed by Kumar Gala
Browse files

ext: stm32cube: stm32f7xx: shift I2SR field in PLLI2SCFGR register 



The I2SR field should be shifted by RCC_PLLI2SCFGR_PLLI2SR_Pos when the
PLLI2SCFGR register is read or written. Without this patch the PLLI2S
configuration is not done properly (R and M params are badly set) and
the PLLI2S generates bad clock waveform.

ST Bug tracker ID: 50108

Signed-off-by: default avatarArmando Visconti <armando.visconti@st.com>
parent 71ba2de7

ext/hal/st/stm32cube/stm32f7xx/README

+7 −0
Original line number Diff line number Diff line
@@ -47,3 +47,10 @@ Patch List: 
    Impacted files:

     drivers/include/stm32f7xx_ll_spi.h

    ST Bug tracker ID: 13359



   *Add correct shifting to I2SR field in PLLI2SCFGR register

     The I2SR field should be shifted by RCC_PLLI2SCFGR_PLLI2SR_Pos when the PLLI2SCFGR register

     is read or written.

    Impacted files:

     drivers/include/stm32f7xx_ll_rcc.h

    ST Bug tracker ID: 50108

ext/hal/st/stm32cube/stm32f7xx/drivers/include/stm32f7xx_ll_rcc.h

+2 −2
Original line number Diff line number Diff line
@@ -4039,7 +4039,7 @@ __STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_SPDIFRX(uint32_t Source, uint32_ 
__STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_I2S(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR)

{

  MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM, Source | PLLM);

  MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN | RCC_PLLI2SCFGR_PLLI2SR, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos | PLLR);

  MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN | RCC_PLLI2SCFGR_PLLI2SR, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos | PLLR << RCC_PLLI2SCFGR_PLLI2SR_Pos);

}



/**
@@ -4090,7 +4090,7 @@ __STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetQ(void) 
  */

__STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetR(void)

{

  return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SR));

  return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);

}



#if defined(RCC_PLLI2SCFGR_PLLI2SP)

CRA Git | Maintained and supported by SUSTech CRA and CCSE