drivers/interrupt_controller/loapic_intr.c: enable x2APIC support

#include <zephyr/types.h>

#include <string.h>

#include <misc/__assert.h>

#include <arch/x86/msr.h>

#include <toolchain.h>

#include <linker/sections.h>

	ARG_UNUSED(unused);

	s32_t loApicMaxLvt; /* local APIC Max LVT */

	/* enable the Local APIC */

	x86_write_loapic(LOAPIC_SVR, x86_read_loapic(LOAPIC_SVR) | LOAPIC_ENABLE);

	/*

	 * enable the local APIC. note that we use xAPIC mode here, since

	 * x2APIC access is not enabled until the next step (if at all).

	 */

	x86_write_xapic(LOAPIC_SVR,

			x86_read_xapic(LOAPIC_SVR) | LOAPIC_ENABLE);

#ifdef CONFIG_X2APIC

	/*

	 * turn on x2APIC mode. we trust the config option, so

	 * we don't check CPUID to see if x2APIC is supported.

	 */

	u64_t msr = z_x86_msr_read(X86_APIC_BASE_MSR);

	msr |= X86_APIC_BASE_MSR_X2APIC;

	z_x86_msr_write(X86_APIC_BASE_MSR, msr);

#endif

	loApicMaxLvt = (x86_read_loapic(LOAPIC_VER) & LOAPIC_MAXLVT_MASK) >> 16;

	/* reset the DFR, TPR, TIMER_CONFIG, and TIMER_ICR */

#define X86_MONITOR_FILTER_SIZE_MSR 0x0006

#define X86_TIME_STAMP_COUNTER_MSR 0x0010

#define X86_X86_SOC_ID_MSR 0x0017

#define X86_APIC_BASE_MSR 0x001b

#define X86_APIC_BASE_MSR_X2APIC BIT(10)

#define X86_FEATURE_CONTROL_MSR 0x003a

#define X86_BIOS_SIGN_MSR 0x008b

#define X86_SMM_MONITOR_CTL_MSR 0x009b