soc: arm: nxp_kinetis: Fix flash MPU configuration for k6x

Fix NXP MPU configuration for k6x flash region. The previous flash MPU
setting was based around the assumption that the user was executing from
the flash region at 0x0000_0000–0x07FF_FFFF, which may not be case if the
user selects to execute from SRAM, such as running from sram_l

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>