Commit 9505ee89 authored by Jordan Yates's avatar Jordan Yates Committed by Anas Nashif
Browse files

linker: xtensa: move IDT_LIST region 



Move the IDT_LIST memory region to the location recommended by
`intlist.ld`. The documentation specifies that this region should not
overlap other regions, and there is no guarantee that the area after the
`SRAM` region is not used. The end of the address space is much less
likely to be a valid RAM address.

Signed-off-by: default avatarJordan Yates <jordan.yates@data61.csiro.au>
parent b2dc1fc9

soc/xtensa/intel_adsp/cavs_v15/include/soc/memory.h

+1 −1
Original line number Diff line number Diff line
@@ -87,7 +87,7 @@ 
 * Interrupt Descriptor Table (IDT). This is a bogus address as this

 * section will be stripped off in the final image.

 */

#define IDT_BASE				(RAM_BASE + RAM_SIZE)

#define IDT_BASE				0xFFFFDFFF



/* size of the Interrupt Descriptor Table (IDT) */

#define IDT_SIZE				0x2000

soc/xtensa/intel_adsp/cavs_v18/include/soc/memory.h

+1 −1
Original line number Diff line number Diff line
@@ -84,7 +84,7 @@ 
 * Interrupt Descriptor Table (IDT). This is a bogus address as this

 * section will be stripped off in the final image.

 */

#define IDT_BASE				(RAM_BASE + RAM_SIZE)

#define IDT_BASE				0xFFFFDFFF



/* size of the Interrupt Descriptor Table (IDT) */

#define IDT_SIZE				0x2000

soc/xtensa/intel_adsp/cavs_v20/include/soc/memory.h

+1 −1
Original line number Diff line number Diff line
@@ -84,7 +84,7 @@ 
 * Interrupt Descriptor Table (IDT). This is a bogus address as this

 * section will be stripped off in the final image.

 */

#define IDT_BASE				(RAM_BASE + RAM_SIZE)

#define IDT_BASE				0xFFFFDFFF



/* size of the Interrupt Descriptor Table (IDT) */

#define IDT_SIZE				0x2000

soc/xtensa/intel_adsp/cavs_v25/include/soc/memory.h

+1 −1
Original line number Diff line number Diff line
@@ -84,7 +84,7 @@ 
 * Interrupt Descriptor Table (IDT). This is a bogus address as this

 * section will be stripped off in the final image.

 */

#define IDT_BASE				(RAM_BASE + RAM_SIZE)

#define IDT_BASE				0xFFFFDFFF



/* size of the Interrupt Descriptor Table (IDT) */

#define IDT_SIZE				0x2000

soc/xtensa/intel_s1000/memory.h

+1 −1
Original line number Diff line number Diff line
@@ -63,7 +63,7 @@ 
 * Interrupt Descriptor Table (IDT). This is a bogus address as this

 * section will be stripped off in the final image.

 */

#define IDT_BASE				(RAM_BASE + RAM_SIZE)

#define IDT_BASE				0xFFFFDFFF



/* size of the Interrupt Descriptor Table (IDT) */

#define IDT_SIZE				0x2000

CRA Git | Maintained and supported by SUSTech CRA and CCSE