boards: st: add initial support for the stm32h757i eval board (941c0312) · Commits · Wenxi XU / zephyr

boards/shields/st_b_lcd40_dsi1_mb1166/boards/st_b_lcd40_dsi1_mb1166/stm32h757i_eval_stm32h757xx_m7.conf

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Changes for boards/shields/st_b_lcd40_dsi1_mb1166/boards/st_b_lcd40_dsi1_mb1166/stm32h757i_eval_stm32h757xx_m7.conf: 7 added lines, 0 removed lines.
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		# Copyright (c) 2023 bytes at work AG
		# Copyright (c) 2024 Erik Andersson <erian747@gmail.com>
		# Copyright (c) 2025 Foss Analytical A/S
		# SPDX-License-Identifier: Apache-2.0

		# Initialize after LTDC and MIPI-DSI
		CONFIG_DISPLAY_OTM8009A_INIT_PRIORITY=87

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Changes for boards/shields/st_b_lcd40_dsi1_mb1166/boards/stm32h757i_eval_stm32h757xx_m7.conf: 6 added lines, 0 removed lines.
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		# Copyright (c) 2023 bytes at work AG
		# Copyright (c) 2025 Foss Analytical A/S
		# SPDX-License-Identifier: Apache-2.0

		CONFIG_MEMC=y
		CONFIG_STM32_LTDC_ARGB8888=y

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Changes for boards/shields/st_b_lcd40_dsi1_mb1166/boards/stm32h757i_eval_stm32h757xx_m7.defconfig: 24 added lines, 0 removed lines.
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		# Copyright (c) 2024 Linumiz
		# Copyright (c) 2025 Foss Analytical A/S
		# SPDX-License-Identifier: Apache-2.0

		if BOARD_STM32H757I_EVAL_STM32H757XX_M7

		if LVGL

		# Double frame buffer maintained by lvgl.
		config STM32_LTDC_FB_NUM
		default 0

		config LV_Z_DOUBLE_VDB
		default y

		config LV_Z_VDB_CUSTOM_SECTION
		default y

		config LV_Z_FULL_REFRESH
		default y

		endif # LVGL

		endif # BOARD_STM32H757I_EVAL_STM32H757XX_M7

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Changes for boards/shields/st_b_lcd40_dsi1_mb1166/boards/stm32h757i_eval_stm32h757xx_m7.overlay: 47 added lines, 0 removed lines.
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		/*
		* Copyright (c) 2023 bytes at work AG
		* Copyright (c) 2025 Foss Analytical A/S
		*
		* SPDX-License-Identifier: Apache-2.0
		*/

		&sdram2 {
		/* Frame buffer memory when cached causes screen flickering. */
		zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
		};

		&zephyr_lcd_controller {
		status = "okay";
		ext-sdram = <&sdram2>;
		def-back-color-red = <0>;
		def-back-color-green = <0>;
		def-back-color-blue = <0>;
		};

		/* ltdc uses pll3_r as pixel clock */
		&pll3 {
		status = "okay";
		clocks = <&clk_hse>;
		div-m = <5>;
		mul-n = <132>;
		div-p = <2>;
		div-q = <2>;
		div-r = <24>; /* 27.5 MHz */
		};

		&zephyr_mipi_dsi {
		status = "okay";

		/* DSI HOST dedicated PLL
		* F_VCO = CLK_IN / pll-idf * 2 * pll-ndiv
		* PHI = F_VCO / 2 / (1 << pll-odf) = lane_byte_clk
		* = 25 MHz / 5 * 2 * 100 / 2 / (1<<0) / 8 = 62.5 MHz
		*/
		pll-ndiv = <100>;
		pll-idf = <5>;
		pll-odf = <0>;

		vs-active-high;
		hs-active-high;
		de-active-high;
		};

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Changes for boards/st/stm32h757i_eval/CMakeLists.txt: 10 added lines, 0 removed lines.
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		#
		# Copyright (c) 2023 BrainCo Inc.
		# Copyright (c) 2025 Foss Analytical A/S
		#
		# SPDX-License-Identifier: Apache-2.0
		#

		# Add custom linker section to relocate framebuffers to PSRAM
		zephyr_linker_sources_ifdef(CONFIG_LV_Z_VDB_CUSTOM_SECTION
		SECTIONS dc_ram.ld)