Commit 90ecdf0d authored by Marek Matej's avatar Marek Matej Committed by Anas Nashif
Browse files

soc: espressif: esp32s2: improve memory layout 



- Allow more statical allocations by reordering the sections
  in the mcuboot.ld and in default.ld.
- Reorder the ROM sections to cover the cases described in
  the `common-rom-common-kernel-devices.ld`.
  Changing the order of .rodata and .text we prevents to create an
  overlapped segments issue.

Signed-off-by: default avatarMarek Matej <marek.matej@espressif.com>
parent fe06ffb3

soc/espressif/esp32s2/default.ld

+56 −56
Original line number Diff line number Diff line
@@ -17,7 +17,7 @@ 
 * If no bootloader is used, we can extend it to gain more user ram.

 */

#ifdef CONFIG_ESP_SIMPLE_BOOT

user_iram_end = (DRAM_BUFFERS_START + IRAM_DRAM_OFFSET);

user_iram_end = (BOOTLOADER_USER_DRAM_END + IRAM_DRAM_OFFSET);

#else

user_iram_end = BOOTLOADER_IRAM_LOADER_SEG_START;

#endif
@@ -31,7 +31,7 @@ user_iram_seg_len = user_idram_size; 
user_dram_seg_len = user_idram_size;



/* Aliases */

#define ROTEXT_REGION     irom0_0_seg

#define FLASH_CODE_REGION irom0_0_seg

#define RODATA_REGION     drom0_0_seg

#define IRAM_REGION       iram0_0_seg

#define RAMABLE_REGION    dram0_0_seg
@@ -42,7 +42,6 @@ user_dram_seg_len = user_idram_size; 
#undef GROUP_ROM_LINK_IN

#define GROUP_ROM_LINK_IN(vregion, lregion) > RODATA_REGION AT > lregion



/* TODO */

#define RESERVE_RTC_MEM 0



MEMORY
@@ -798,10 +797,63 @@ SECTIONS 


  /* --- END OF DRAM --- */



  /* --- START OF .flash.text --- */



  _image_irom_start = LOADADDR(.flash.text);

  _image_irom_size = SIZEOF(.flash.text);

  _image_irom_vaddr = ADDR(.flash.text);



  .flash.text_dummy (NOLOAD):

  {

    . = ALIGN(CACHE_ALIGN);

  } GROUP_LINK_IN(ROMABLE_REGION)



  .flash.text : ALIGN(4)

  {

    _stext = .;

    _instruction_reserved_start = ABSOLUTE(.);

    _text_start = ABSOLUTE(.);

    __text_region_start = ABSOLUTE(.);



#if !defined(CONFIG_ESP32_WIFI_IRAM_OPT)

    *libnet80211.a:( .wifi0iram  .wifi0iram.* .wifislpiram .wifislpiram.*)

    *libpp.a:( .wifi0iram  .wifi0iram.* .wifislpiram .wifislpiram.* .wifiorslpiram .wifiorslpiram.*)



#endif



#if !defined(CONFIG_ESP32_WIFI_RX_IRAM_OPT)

    *libnet80211.a:( .wifirxiram  .wifirxiram.* .wifislprxiram .wifislprxiram.*)

    *libpp.a:( .wifirxiram  .wifirxiram.* .wifislprxiram .wifislprxiram.*)

#endif



    *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)

    *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */

    *(.fini.literal)

    *(.fini)

    *(.gnu.version)

    *(.literal .text .literal.* .text.*)



    /* CPU will try to prefetch up to 16 bytes of

     * of instructions. This means that any configuration (e.g. MMU, PMS) must allow

     * safe access to up to 16 bytes after the last real instruction, add

     * dummy bytes to ensure this

     */

    . += 16;



    _text_end = ABSOLUTE(.);

    _instruction_reserved_end = ABSOLUTE(.);  /* This is a symbol marking the flash.text end, this can be used for mmu driver to maintain virtual address */

    __text_region_end = ABSOLUTE(.);

    _etext = .;



  } GROUP_DATA_LINK_IN(FLASH_CODE_REGION, ROMABLE_REGION)



  /* --- END OF .flash.text --- */



  /* --- START OF .rodata --- */



  _image_drom_start = LOADADDR(.flash.rodata);

  _image_drom_size = LOADADDR(.flash.rodata_end) + SIZEOF(.flash.rodata_end)  - _image_drom_start;

  _image_drom_size2 = _rodata_end - _rodata_start;

  _image_drom_vaddr = ADDR(.flash.rodata);



  /* Align next section to 64k to allow mapping */
@@ -843,7 +895,6 @@ SECTIONS 
    *(.dynamic)

    *(.gnu.version_d)

    . = ALIGN(4);

    _rodata_end = ABSOLUTE(.);

    /* Literals are also RO data. */

    _lit4_start = ABSOLUTE(.);

    *(*.lit4)
@@ -871,6 +922,7 @@ SECTIONS 
  .flash.rodata_end :

  {

    . = ALIGN(CACHE_ALIGN);

    _rodata_end = ABSOLUTE(.);

    _image_rodata_end = ABSOLUTE(.);

    _rodata_reserved_end = ABSOLUTE(.);

    __rodata_region_end = ABSOLUTE(.);
@@ -879,58 +931,6 @@ SECTIONS 


  /* --- END OF .rodata --- */



  /* --- START OF .flash.text --- */



  _image_irom_start = LOADADDR(.flash.text);

  _image_irom_size = LOADADDR(.flash.text) + SIZEOF(.flash.text) - _image_irom_start;

  _image_irom_vaddr = ADDR(.flash.text);



  .flash.text_dummy (NOLOAD):

  {

    . = ALIGN(CACHE_ALIGN+CACHE_ALIGN);

  } GROUP_LINK_IN(ROMABLE_REGION)



  .flash.text : ALIGN(4)

  {

    _stext = .;

    _instruction_reserved_start = ABSOLUTE(.);

    _text_start = ABSOLUTE(.);

    __text_region_start = ABSOLUTE(.);



#if !defined(CONFIG_ESP32_WIFI_IRAM_OPT)

    *libnet80211.a:( .wifi0iram  .wifi0iram.* .wifislpiram .wifislpiram.*)

    *libpp.a:( .wifi0iram  .wifi0iram.* .wifislpiram .wifislpiram.* .wifiorslpiram .wifiorslpiram.*)



#endif



#if !defined(CONFIG_ESP32_WIFI_RX_IRAM_OPT)

    *libnet80211.a:( .wifirxiram  .wifirxiram.* .wifislprxiram .wifislprxiram.*)

    *libpp.a:( .wifirxiram  .wifirxiram.* .wifislprxiram .wifislprxiram.*)

#endif



    *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)

    *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */

    *(.fini.literal)

    *(.fini)

    *(.gnu.version)

    *(.literal .text .literal.* .text.*)



    /* CPU will try to prefetch up to 16 bytes of

     * of instructions. This means that any configuration (e.g. MMU, PMS) must allow

     * safe access to up to 16 bytes after the last real instruction, add

     * dummy bytes to ensure this

     */

    . += 16;



    _text_end = ABSOLUTE(.);

    _instruction_reserved_end = ABSOLUTE(.);  /* This is a symbol marking the flash.text end, this can be used for mmu driver to maintain virtual address */

    __text_region_end = ABSOLUTE(.);

    _etext = .;



  } GROUP_DATA_LINK_IN(ROTEXT_REGION, ROMABLE_REGION)



  /* --- END OF .flash.text --- */



#ifdef CONFIG_GEN_ISR_TABLES

#include <zephyr/linker/intlist.ld>

#endif

soc/espressif/esp32s2/mcuboot.ld

+43 −39
Original line number Diff line number Diff line
@@ -61,20 +61,19 @@ SECTIONS 
    *libzephyr.a:cache_hal.*(.literal .text .literal.* .text.*)

    *libzephyr.a:flash_map.*(.literal .text .literal.* .text.*)

    *libzephyr.a:esp_rom_spiflash.*(.literal .text .literal.* .text.*)



    *libzephyr.a:heap.*(.literal .text .literal.* .text.*)



    *libkernel.a:kheap.*(.literal .text .literal.* .text.*)

    *libkernel.a:mempool.*(.literal .text .literal.* .text.*)

    *libkernel.a:device.*(.literal .text .literal.* .text.*)

    *libkernel.a:timeout.*(.literal .text .literal.* .text.*)



    *(.literal.bootloader_mmap .text.bootloader_mmap)

    *(.literal.bootloader_munmap .text.bootloader_munmap)



    *libzephyr.a:esp_loader.*(.literal .text .literal.* .text.*)

    *libzephyr.a:mmu_hal.*(.literal .text .literal.* .text.*)

    *libzephyr.a:rtc_time.*(.literal .literal.* .text .text.*)

    *libzephyr.a:rtc_clk.*(.literal .literal.* .text .text.*)

    *libzephyr.a:rtc_clk_init.*(.literal .literal.* .text .text.*)



    *(.literal.bootloader_mmap .text.bootloader_mmap)

    *(.literal.bootloader_munmap .text.bootloader_munmap)

    *(.literal.esp_intr_disable .literal.esp_intr_disable.* .text.esp_intr_disable .text.esp_intr_disable.*)

    *(.literal.default_intr_handler .text.default_intr_handler .iram1.*.default_intr_handler)

    *(.literal.esp_log_timestamp .text.esp_log_timestamp)
@@ -90,14 +89,7 @@ SECTIONS 
     * safe access to up to 16 bytes after the last real instruction, add

     * dummy bytes to ensure this

     */

    . += 16;



    _text_end = ABSOLUTE(.);

    _etext = .;

    . = ALIGN(4);

    _loader_text_end = ABSOLUTE(.);

    _iram_text_end = ABSOLUTE(.);

    _iram_end = ABSOLUTE(.);

    . = ALIGN(4) + 16;

  } > iram_loader_seg



  .iram0.vectors : ALIGN(4)
@@ -136,7 +128,6 @@ SECTIONS 
    *(.entry.text)

    *(.init.literal)

    *(.init)

    . = ALIGN (4);

    _init_end = ABSOLUTE(.);



    _iram_start = ABSOLUTE(.);
@@ -156,33 +147,14 @@ SECTIONS 
    . = ALIGN(4);

  } > iram_seg



  .dram0.data : ALIGN(16)

  .dram.rodata :

  {

    . = ALIGN(4);

    __data_start = ABSOLUTE(.);



    #include <snippets-rodata.ld>

    __rodata_region_start = ABSOLUTE(.);



    . = ALIGN(4);

    #include <snippets-rwdata.ld>

    #include <snippets-rodata.ld>

    . = ALIGN(4);



    *(.data)

    *(.data.*)

    *(.gnu.linkonce.d.*)

    *(.data1)

    *(.sdata)

    *(.sdata.*)

    *(.gnu.linkonce.s.*)

    *(.sdata2)

    *(.sdata2.*)

    *(.gnu.linkonce.s2.*)

    *libzephyr.a:mmu_hal.*(.rodata .rodata.*)

    *libzephyr.a:rtc_clk.*(.rodata .rodata.*)



    KEEP(*(.jcr))

    *(.dram1 .dram1.*)

    . = ALIGN(4);

    *(.rodata)

    *(.rodata.*)
@@ -216,17 +188,49 @@ SECTIONS 
    *(.gnu.linkonce.lit4.*)

    _lit4_end = ABSOLUTE(.);

    . = ALIGN(4);

    _thread_local_start = ABSOLUTE(.);

    *(.tdata)

    *(.tdata.*)

    *(.tbss)

    *(.tbss.*)

    *(.rodata_wlog)

    *(.rodata_wlog*)

    _thread_local_end = ABSOLUTE(.);

    . = ALIGN(4);

  } > dram_seg



  #include <zephyr/linker/common-rom/common-rom-cpp.ld>

  #include <zephyr/linker/common-rom/common-rom-kernel-devices.ld>

  #include <zephyr/linker/common-rom/common-rom-debug.ld>

  #include <zephyr/linker/common-rom/common-rom-misc.ld>

  #include <snippets-sections.ld>



  .dram0.data :

  {

    __data_start = ABSOLUTE(.);



    . = ALIGN(4);

    #include <snippets-rwdata.ld>

    . = ALIGN(4);



    *(.data)

    *(.data.*)

    *(.gnu.linkonce.d.*)

    *(.data1)

    *(.sdata)

    *(.sdata.*)

    *(.gnu.linkonce.s.*)

    *(.sdata2)

    *(.sdata2.*)

    *(.gnu.linkonce.s2.*)

    *libzephyr.a:mmu_hal.*(.rodata .rodata.*)

    *libzephyr.a:rtc_clk.*(.rodata .rodata.*)



    KEEP(*(.jcr))

    *(.dram1 .dram1.*)

    . = ALIGN(4);

  } > dram_seg



  #include <zephyr/linker/cplusplus-rom.ld>

  #include <snippets-data-sections.ld>

  #include <zephyr/linker/common-ram.ld>
@@ -246,7 +250,7 @@ SECTIONS 
  .bss (NOLOAD):

  {

    . = ALIGN (8);

    _bss_start = ABSOLUTE(.); /* required by bluetooth library */

    _bss_start = ABSOLUTE(.);

    __bss_start = ABSOLUTE(.);



    *(.dynsbss)

soc/espressif/esp32s2/memory.h

+14 −12
Original line number Diff line number Diff line
@@ -29,26 +29,28 @@ 
 */

#define IRAM_DRAM_OFFSET         0x70000

#define DRAM_BUFFERS_START       0x3ffeab00

#define DRAM_RESERVED_START      0x3ffec000

#define DRAM_STACK_START         0x3fffc410

#define DRAM_ROM_BSS_DATA_START  0x3fffe710



/* For safety margin between bootloader data section and startup stacks */

#define BOOTLOADER_STACK_OVERHEAD      0x0

#define BOOTLOADER_DRAM_SEG_LEN        0x7000

#define BOOTLOADER_IRAM_LOADER_SEG_LEN 0x3000

#define BOOTLOADER_IRAM_SEG_LEN        0xa000



/* Base address used for calculating memory layout

 * counted from Dbus backwards and back to the Ibus

 */

#define BOOTLOADER_USABLE_DRAM_END  DRAM_BUFFERS_START



/* For safety margin between bootloader data section and startup stacks */

#define BOOTLOADER_STACK_OVERHEAD      0x0

#define BOOTLOADER_DRAM_SEG_LEN        0x6000

#define BOOTLOADER_IRAM_LOADER_SEG_LEN 0x2800

#define BOOTLOADER_IRAM_SEG_LEN        0x8000

#define BOOTLOADER_USER_DRAM_END (DRAM_RESERVED_START - BOOTLOADER_STACK_OVERHEAD)



/* Start of the lower region is determined by region size and the end of the higher region */

#define BOOTLOADER_DRAM_SEG_END   (BOOTLOADER_USABLE_DRAM_END - BOOTLOADER_STACK_OVERHEAD)

#define BOOTLOADER_DRAM_SEG_START (BOOTLOADER_DRAM_SEG_END - BOOTLOADER_DRAM_SEG_LEN)

#define BOOTLOADER_IRAM_LOADER_SEG_START (BOOTLOADER_DRAM_SEG_START - \

					BOOTLOADER_IRAM_LOADER_SEG_LEN + IRAM_DRAM_OFFSET)

#define BOOTLOADER_IRAM_SEG_START (BOOTLOADER_IRAM_LOADER_SEG_START - BOOTLOADER_IRAM_SEG_LEN)

#define BOOTLOADER_IRAM_LOADER_SEG_START (BOOTLOADER_USER_DRAM_END + IRAM_DRAM_OFFSET \

					- BOOTLOADER_IRAM_LOADER_SEG_LEN)

#define BOOTLOADER_DRAM_SEG_START (BOOTLOADER_IRAM_LOADER_SEG_START - BOOTLOADER_DRAM_SEG_LEN \

					- IRAM_DRAM_OFFSET)

#define BOOTLOADER_IRAM_SEG_START (BOOTLOADER_DRAM_SEG_START - BOOTLOADER_IRAM_SEG_LEN \

					+ IRAM_DRAM_OFFSET)



/* Flash */

#ifdef CONFIG_FLASH_SIZE

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