include: drivers: clock_control: stm32: fix xtpre

Correct DT property to set correct STM32_PLL_XTPRE value.
The driver bindings defined `xtpre` instead of used `xtre`
in the `DT_PROP` macro.
That allows to use F1 PLL clock with division by 2.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>