Commit 89679cd9 authored by Peter Mitsis's avatar Peter Mitsis Committed by Anas Nashif
Browse files

linker: Add Z_LINK_ITERABLE_SUBALIGN



The macro Z_LINK_ITERABLE_SUBALIGN is used by linker scripts to
select the default subalignment based on whether it is 32/64-bit
architecture. 64-bit architectures set the default subalignment
to 8, while 32-bit architectures set it to 4.

Signed-off-by: default avatarPeter Mitsis <peter.mitsis@intel.com>
parent d382c3d6
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+35 −35
Original line number Diff line number Diff line
@@ -5,10 +5,10 @@
#if defined(CONFIG_NETWORKING)
#ifndef NETWORK_RAM_SECTIONS
#define NETWORK_RAM_SECTIONS \
	ITERABLE_SECTION_RAM(net_if, 4) \
	ITERABLE_SECTION_RAM(net_if_dev, 4) \
	ITERABLE_SECTION_RAM(net_l2, 4) \
	ITERABLE_SECTION_RAM(eth_bridge, 4)
	ITERABLE_SECTION_RAM(net_if, Z_LINK_ITERABLE_SUBALIGN) \
	ITERABLE_SECTION_RAM(net_if_dev, Z_LINK_ITERABLE_SUBALIGN) \
	ITERABLE_SECTION_RAM(net_l2, Z_LINK_ITERABLE_SUBALIGN) \
	ITERABLE_SECTION_RAM(eth_bridge, Z_LINK_ITERABLE_SUBALIGN)
#endif
#endif /* NETWORKING */

@@ -44,7 +44,7 @@
        } GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

#if CONFIG_PM_DEVICE
	ITERABLE_SECTION_RAM(pm_device_slots, 4)
	ITERABLE_SECTION_RAM(pm_device_slots, Z_LINK_ITERABLE_SUBALIGN)
#endif

#if defined(CONFIG_DEVICE_DEPS_DYNAMIC)
@@ -54,9 +54,9 @@
	} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
#endif 	/* CONFIG_DEVICE_DEPS_DYNAMIC */

	ITERABLE_SECTION_RAM_GC_ALLOWED(log_mpsc_pbuf, 4)
	ITERABLE_SECTION_RAM(log_msg_ptr, 4)
	ITERABLE_SECTION_RAM(log_dynamic, 4)
	ITERABLE_SECTION_RAM_GC_ALLOWED(log_mpsc_pbuf, Z_LINK_ITERABLE_SUBALIGN)
	ITERABLE_SECTION_RAM(log_msg_ptr, Z_LINK_ITERABLE_SUBALIGN)
	ITERABLE_SECTION_RAM(log_dynamic, Z_LINK_ITERABLE_SUBALIGN)

#ifdef CONFIG_USERSPACE
	/* All kernel objects within are assumed to be either completely
@@ -69,34 +69,34 @@
	_static_kernel_objects_begin = .;
#endif /* CONFIG_USERSPACE */

	ITERABLE_SECTION_RAM_GC_ALLOWED(k_timer, 4)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_mem_slab, 4)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_heap, 4)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_mutex, 4)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_stack, 4)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_msgq, 4)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_mbox, 4)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_pipe, 4)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_sem, 4)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_event, 4)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_queue, 4)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_fifo, 4)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_lifo, 4)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_condvar, 4)
	ITERABLE_SECTION_RAM_GC_ALLOWED(sys_mem_blocks_ptr, 4)

	ITERABLE_SECTION_RAM(net_buf_pool, 4)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_timer, Z_LINK_ITERABLE_SUBALIGN)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_mem_slab, Z_LINK_ITERABLE_SUBALIGN)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_heap, Z_LINK_ITERABLE_SUBALIGN)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_mutex, Z_LINK_ITERABLE_SUBALIGN)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_stack, Z_LINK_ITERABLE_SUBALIGN)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_msgq, Z_LINK_ITERABLE_SUBALIGN)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_mbox, Z_LINK_ITERABLE_SUBALIGN)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_pipe, Z_LINK_ITERABLE_SUBALIGN)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_sem, Z_LINK_ITERABLE_SUBALIGN)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_event, Z_LINK_ITERABLE_SUBALIGN)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_queue, Z_LINK_ITERABLE_SUBALIGN)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_fifo, Z_LINK_ITERABLE_SUBALIGN)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_lifo, Z_LINK_ITERABLE_SUBALIGN)
	ITERABLE_SECTION_RAM_GC_ALLOWED(k_condvar, Z_LINK_ITERABLE_SUBALIGN)
	ITERABLE_SECTION_RAM_GC_ALLOWED(sys_mem_blocks_ptr, Z_LINK_ITERABLE_SUBALIGN)

	ITERABLE_SECTION_RAM(net_buf_pool, Z_LINK_ITERABLE_SUBALIGN)

#if defined(CONFIG_NETWORKING)
	NETWORK_RAM_SECTIONS
#endif /* NETWORKING */

#if defined(CONFIG_PCIE)
	ITERABLE_SECTION_RAM(pcie_dev, 4)
	ITERABLE_SECTION_RAM(pcie_dev, Z_LINK_ITERABLE_SUBALIGN)
#endif /* PCIE */

#if defined(CONFIG_UART_MUX)
	ITERABLE_SECTION_RAM(uart_mux, 4)
	ITERABLE_SECTION_RAM(uart_mux, Z_LINK_ITERABLE_SUBALIGN)
#endif

#if defined(CONFIG_USB_DEVICE_STACK)
@@ -108,7 +108,7 @@
		__usb_descriptor_end = .;
	} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	ITERABLE_SECTION_RAM(usb_cfg_data, 4)
	ITERABLE_SECTION_RAM(usb_cfg_data, Z_LINK_ITERABLE_SUBALIGN)
#endif /* CONFIG_USB_DEVICE_STACK */

#if defined(CONFIG_USB_DEVICE_BOS)
@@ -122,14 +122,14 @@
#endif /* CONFIG_USB_DEVICE_BOS */

#if defined(CONFIG_RTIO)
	ITERABLE_SECTION_RAM(rtio, 4)
	ITERABLE_SECTION_RAM(rtio_iodev, 4)
	ITERABLE_SECTION_RAM(rtio_sqe_pool, 4)
	ITERABLE_SECTION_RAM(rtio_cqe_pool, 4)
	ITERABLE_SECTION_RAM(rtio, Z_LINK_ITERABLE_SUBALIGN)
	ITERABLE_SECTION_RAM(rtio_iodev, Z_LINK_ITERABLE_SUBALIGN)
	ITERABLE_SECTION_RAM(rtio_sqe_pool, Z_LINK_ITERABLE_SUBALIGN)
	ITERABLE_SECTION_RAM(rtio_cqe_pool, Z_LINK_ITERABLE_SUBALIGN)
#endif /* CONFIG_RTIO */

#if defined(CONFIG_SENSING)
	ITERABLE_SECTION_RAM(sensing_sensor, 4)
	ITERABLE_SECTION_RAM(sensing_sensor, Z_LINK_ITERABLE_SUBALIGN)
#endif /* CONFIG_SENSING */

#if defined(CONFIG_ZBUS)
@@ -137,11 +137,11 @@
#endif /* CONFIG_ZBUS */

#if defined(CONFIG_DEVICE_MUTABLE)
	ITERABLE_SECTION_RAM(device_mutable, 4)
	ITERABLE_SECTION_RAM(device_mutable, Z_LINK_ITERABLE_SUBALIGN)
#endif

#if defined(CONFIG_BT_ZEPHYR_NUS)
	ITERABLE_SECTION_RAM(bt_nus_inst, 4)
	ITERABLE_SECTION_RAM(bt_nus_inst, Z_LINK_ITERABLE_SUBALIGN)
#endif

#ifdef CONFIG_USERSPACE
+12 −12
Original line number Diff line number Diff line
@@ -2,41 +2,41 @@

#include <zephyr/linker/iterable_sections.h>

	ITERABLE_SECTION_ROM(bt_l2cap_fixed_chan, 4)
	ITERABLE_SECTION_ROM(bt_l2cap_fixed_chan, Z_LINK_ITERABLE_SUBALIGN)

#if defined(CONFIG_BT_CLASSIC)
	ITERABLE_SECTION_ROM(bt_l2cap_br_fixed_chan, 4)
	ITERABLE_SECTION_ROM(bt_l2cap_br_fixed_chan, Z_LINK_ITERABLE_SUBALIGN)
#endif

#if defined(CONFIG_BT_CONN)
	ITERABLE_SECTION_ROM(bt_conn_cb, 4)
	ITERABLE_SECTION_ROM(bt_conn_cb, Z_LINK_ITERABLE_SUBALIGN)
#endif

	ITERABLE_SECTION_ROM(bt_gatt_service_static, 4)
	ITERABLE_SECTION_ROM(bt_gatt_service_static, Z_LINK_ITERABLE_SUBALIGN)

#if defined(CONFIG_BT_MESH)
	ITERABLE_SECTION_ROM(bt_mesh_subnet_cb, 4)
	ITERABLE_SECTION_ROM(bt_mesh_app_key_cb, 4)
	ITERABLE_SECTION_ROM(bt_mesh_subnet_cb, Z_LINK_ITERABLE_SUBALIGN)
	ITERABLE_SECTION_ROM(bt_mesh_app_key_cb, Z_LINK_ITERABLE_SUBALIGN)

	ITERABLE_SECTION_ROM(bt_mesh_hb_cb, 4)
	ITERABLE_SECTION_ROM(bt_mesh_hb_cb, Z_LINK_ITERABLE_SUBALIGN)

#if defined(CONFIG_BT_TESTING)
	ITERABLE_SECTION_ROM(bt_mesh_beacon_cb, 4)
	ITERABLE_SECTION_ROM(bt_mesh_beacon_cb, Z_LINK_ITERABLE_SUBALIGN)
#endif
#endif

#if defined(CONFIG_BT_MESH_FRIEND)
	ITERABLE_SECTION_ROM(bt_mesh_friend_cb, 4)
	ITERABLE_SECTION_ROM(bt_mesh_friend_cb, Z_LINK_ITERABLE_SUBALIGN)
#endif

#if defined(CONFIG_BT_MESH_LOW_POWER)
	ITERABLE_SECTION_ROM(bt_mesh_lpn_cb, 4)
	ITERABLE_SECTION_ROM(bt_mesh_lpn_cb, Z_LINK_ITERABLE_SUBALIGN)
#endif

#if defined(CONFIG_BT_IAS)
	ITERABLE_SECTION_ROM(bt_ias_cb, 4)
	ITERABLE_SECTION_ROM(bt_ias_cb, Z_LINK_ITERABLE_SUBALIGN)
#endif

#if defined(CONFIG_BT_MESH_GATT_PROXY)
	ITERABLE_SECTION_ROM(bt_mesh_proxy_cb, 4)
	ITERABLE_SECTION_ROM(bt_mesh_proxy_cb, Z_LINK_ITERABLE_SUBALIGN)
#endif
+1 −1
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@

#include <zephyr/linker/iterable_sections.h>

	ITERABLE_SECTION_ROM(tracing_backend, 4)
	ITERABLE_SECTION_ROM(tracing_backend, Z_LINK_ITERABLE_SUBALIGN)

	SECTION_DATA_PROLOGUE(zephyr_dbg_info,,)
	{
+5 −5
Original line number Diff line number Diff line
@@ -23,7 +23,7 @@
		__deferred_init_list_end = .;
	} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	ITERABLE_SECTION_ROM_NUMERIC(device, 4)
	ITERABLE_SECTION_ROM_NUMERIC(device, Z_LINK_ITERABLE_SUBALIGN)

#if defined(CONFIG_GEN_SW_ISR_TABLE) && defined(CONFIG_SHARED_INTERRUPTS)
	/* since z_shared_isr() is not referenced anywhere when
@@ -78,7 +78,7 @@
	/* Build-time assignment of permissions to kernel objects to
	 * threads declared with K_THREAD_DEFINE()
	 */
	ITERABLE_SECTION_ROM(k_object_assignment, 4)
	ITERABLE_SECTION_ROM(k_object_assignment, Z_LINK_ITERABLE_SUBALIGN)
#endif

	SECTION_DATA_PROLOGUE(app_shmem_regions,,)
@@ -88,12 +88,12 @@
		__app_shmem_regions_end = .;
	} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

	ITERABLE_SECTION_ROM(k_p4wq_initparam, 4)
	ITERABLE_SECTION_ROM(k_p4wq_initparam, Z_LINK_ITERABLE_SUBALIGN)

	ITERABLE_SECTION_ROM(_static_thread_data, 4)
	ITERABLE_SECTION_ROM(_static_thread_data, Z_LINK_ITERABLE_SUBALIGN)

#if defined(CONFIG_PCIE)
	ITERABLE_SECTION_ROM(irq_alloc, 4)
	ITERABLE_SECTION_ROM(irq_alloc, Z_LINK_ITERABLE_SUBALIGN)
#endif /* CONFIG_PCIE */

#if !defined(CONFIG_DEVICE_DEPS_DYNAMIC)
+5 −5
Original line number Diff line number Diff line
@@ -3,16 +3,16 @@
#include <zephyr/linker/iterable_sections.h>

#if defined(CONFIG_LOG_FMT_SECTION_STRIP) && defined(DEVNULL_REGION)
	SECTION_PROLOGUE(log_strings,(COPY),SUBALIGN(4))
	SECTION_PROLOGUE(log_strings,(COPY),Z_LINK_ITERABLE_SUBALIGN)
	{
		Z_LINK_ITERABLE(log_strings);
	} GROUP_ROM_LINK_IN(DEVNULL_REGION, DEVNULL_REGION)
#else
	ITERABLE_SECTION_ROM(log_strings, 4)
	ITERABLE_SECTION_ROM(log_strings, Z_LINK_ITERABLE_SUBALIGN)
#endif

	ITERABLE_SECTION_ROM(log_const, 4)
	ITERABLE_SECTION_ROM(log_const, Z_LINK_ITERABLE_SUBALIGN)

	ITERABLE_SECTION_ROM(log_backend, 4)
	ITERABLE_SECTION_ROM(log_backend, Z_LINK_ITERABLE_SUBALIGN)

	ITERABLE_SECTION_ROM(log_link, 4)
	ITERABLE_SECTION_ROM(log_link, Z_LINK_ITERABLE_SUBALIGN)
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