arch: arm: implement cmse address range check (secure) (87936612) · Commits · Wenxi XU / zephyr

arch/arm/core/cortex_m/cmse/arm_core_cmse.c

+35 −1

Original line number	Diff line number	Diff line
		@@ -131,9 +131,43 @@ int arm_cmse_addr_nonsecure_read_ok(u32_t addr, int force_npriv)
		return arm_cmse_addr_nonsecure_read_write_ok(addr, force_npriv, 0);
		}

		int arm_cmse_addr_nonsecure_read_write_ok(u32_t addr, int force_npriv)
		int arm_cmse_addr_nonsecure_readwrite_ok(u32_t addr, int force_npriv)
		{
		return arm_cmse_addr_nonsecure_read_write_ok(addr, force_npriv, 1);
		}

		static int arm_cmse_addr_range_nonsecure_read_write_ok(u32_t addr, u32_t size,
		int force_npriv, int rw)
		{
		int flags = CMSE_NONSECURE;

		if (force_npriv) {
		flags \|= CMSE_MPU_UNPRIV;
		}
		if (rw) {
		flags \|= CMSE_MPU_READWRITE;
		} else {
		flags \|= CMSE_MPU_READ;
		}
		if (cmse_check_address_range((void *)addr, size, flags) != NULL) {
		return 1;
		} else {
		return 0;
		}
		}

		int arm_cmse_addr_range_nonsecure_read_ok(u32_t addr, u32_t size,
		int force_npriv)
		{
		return arm_cmse_addr_range_nonsecure_read_write_ok(addr, size,
		force_npriv, 0);
		}

		int arm_cmse_addr_range_nonsecure_readwrite_ok(u32_t addr, u32_t size,
		int force_npriv)
		{
		return arm_cmse_addr_range_nonsecure_read_write_ok(addr, size,
		force_npriv, 1);
		}

		#endif /* CONFIG_ARM_SECURE_FIRMWARE */

arch/arm/include/cortex_m/cmse.h

+47 −1

Original line number	Diff line number	Diff line
		@@ -319,7 +319,53 @@ int arm_cmse_addr_nonsecure_read_ok(u32_t addr, int force_npriv);
		*
		* @return 1 if address is Read and Writable from Non-Secure state, 0 otherwise
		*/
		int arm_cmse_addr_nonsecure_read_write_ok(u32_t addr, int force_npriv);
		int arm_cmse_addr_nonsecure_readwrite_ok(u32_t addr, int force_npriv);

		/**
		* @brief Non-Secure Read accessibility of an address range
		*
		* Evaluates whether a memory address range, specified by its base address
		* and size, can be read according to the permissions of the Non-Secure state
		* MPU and the specified operation mode.
		*
		* This function shall always return zero:
		* - if executed from Non-Secure mode,
		* - if the address matches multiple MPU (and/or SAU/IDAU) regions.
		*
		* @param addr The base address of an address range,
		* for which the readability is requested
		* @param size The size of the address range
		* @param force_npriv Instruct to return the readability of the address range
		* for unprivileged access, regardless of whether the current
		* mode is privileged or unprivileged.
		*
		* @return 1 if address range is readable, 0 otherwise.
		*/
		int arm_cmse_addr_range_nonsecure_read_ok(u32_t addr, u32_t size,
		int force_npriv);

		/**
		* @brief Non-Secure Read and Write accessibility of an address range
		*
		* Evaluates whether a memory address range, specified by its base address
		* and size, can be read and written according to the permissions of the
		* Non-Secure state MPU and the specified operation mode.
		*
		* This function shall always return zero:
		* - if executed from Non-Secure mode,
		* - if the address matches multiple MPU (and/or SAU/IDAU) regions.
		*
		* @param addr The base address of an address range,
		* for which Read and Write ability is requested
		* @param size The size of the address range
		* @param force_npriv Instruct to return the readability of the address range
		* for unprivileged access, regardless of whether the current
		* mode is privileged or unprivileged.
		*
		* @return 1 if address range is readable, 0 otherwise.
		*/
		int arm_cmse_addr_range_nonsecure_readwrite_ok(u32_t addr, u32_t size,
		int force_npriv);

		#endif /* CONFIG_ARM_SECURE_FIRMWARE */

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