arm: tz: secure_entry_functions.ld: Fix NSC_ALIGN for nRF devices (81e7608c) · Commits · Wenxi XU / zephyr

If the location counter ('.') is within the area that the veneers should go, the current solution will give a linker error ("Cannot move location counter backwards"). This patch places the veneers in the next SPU region in this case. Signed-off-by:

Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>

arch/arm/core/aarch32/cortex_m/tz/secure_entry_functions.ld

+4 −2

Original line number	Diff line number	Diff line
		@@ -7,9 +7,11 @@
		/* nRF-specific defines. */
		#if defined(CONFIG_CPU_HAS_NRF_IDAU) && CONFIG_ARM_NSC_REGION_BASE_ADDRESS == 0
		/* This SOC needs the NSC region to be at the end of an SPU region. */
		#define __NSC_ALIGN (ALIGN(CONFIG_NRF_SPU_FLASH_REGION_SIZE) \
		- MAX(32, (1 << LOG2CEIL(__sg_size))))
		#define NSC_ALIGN \
		. = ALIGN(CONFIG_NRF_SPU_FLASH_REGION_SIZE) \
		- (1 << LOG2CEIL(__sg_size))
		. = (__NSC_ALIGN + ((ABSOLUTE(.) > __NSC_ALIGN) \
		? CONFIG_NRF_SPU_FLASH_REGION_SIZE : 0))
		#define NSC_ALIGN_END . = ALIGN(CONFIG_NRF_SPU_FLASH_REGION_SIZE)
		#endif /* CONFIG_CPU_HAS_NRF_IDAU && CONFIG_ARM_NSC_REGION_BASE_ADDRESS != 0 */

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