Commit 77019792 authored by Armando Visconti's avatar Armando Visconti Committed by Anas Nashif
Browse files

board: 96b_argonkey: Add on-board MP34DT05 microphone support in BSP 



This commit is taking care of following stuff:

1. pinmux: STM32F4 micro is using I2S5_CK and I2S_SD to interface with
   on-board microphone.

2. default configuration:
     - enable I2S5 and configure PLLI2S properly to generate
       I2SxCLK = 128MHz.
     - enable DMA

Note:
 As stated in issue #9028 we needed to take care of a known SPI/I2S bug
 implementing the following two actions:

 A. APB2 clock has been slowed down to 42MHz.
 B. The SPI/I2S clock gpio speed has been set to very_high_speed.

Signed-off-by: default avatarArmando Visconti <armando.visconti@st.com>
parent cfa04c31

boards/arm/96b_argonkey/96b_argonkey.dts

+4 −0
Original line number Diff line number Diff line
@@ -68,6 +68,10 @@ 
	};

};



&i2s5 {

	status = "ok";

};



&i2c1 {

	status = "ok";

	clock-frequency = <I2C_BITRATE_FAST>;

boards/arm/96b_argonkey/96b_argonkey_defconfig

+2 −1
Original line number Diff line number Diff line
@@ -34,8 +34,9 @@ CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=8 
CONFIG_CLOCK_STM32_AHB_PRESCALER=1



# APB1 clock must not exceed 50MHz limit

# APB2 clock is fixed at 42MHz to prevent known SPI/I2S bug

CONFIG_CLOCK_STM32_APB1_PRESCALER=2

CONFIG_CLOCK_STM32_APB2_PRESCALER=1

CONFIG_CLOCK_STM32_APB2_PRESCALER=2



# console

CONFIG_CONSOLE=y

boards/arm/96b_argonkey/Kconfig.defconfig

+30 −0
Original line number Diff line number Diff line
@@ -46,6 +46,36 @@ config SPI_STM32_INTERRUPT 


endif # SPI



if I2S



config I2S_STM32

	def_bool y



# configure PLLI2S to generate a I2SxCLK=128MHz

config I2S_STM32_USE_PLLI2S_ENABLE

	def_bool y



config I2S_STM32_PLLI2S_PLLM

	default 8



config I2S_STM32_PLLI2S_PLLN

	default 192



config I2S_STM32_PLLI2S_PLLR

	default 3



config I2S_5

	def_bool y



endif # I2S



if DMA



config DMA_STM32F4X

	def_bool y



endif # DMA



if LSM6DSL



choice LSM6DSL_BUS_TYPE

boards/arm/96b_argonkey/doc/96b_argonkey.rst

+1 −1
Original line number Diff line number Diff line
@@ -102,7 +102,7 @@ System Clock 
96Boards Argonkey can be driven by an internal oscillator as well as the main

PLL clock. In default board configuration, the 16MHz external oscillator is

used to drive the main PLL clock to generate a System Clock (SYSCLK) at 84MHz.

On the bus side, AHB and APB2 clock runs at 84MHz, while APB1 runs at 42MHz.

On the bus side, AHB clock runs at 84MHz, while APB1/APB2 clock runs at 42MHz.



Serial Port

===========

boards/arm/96b_argonkey/pinmux.c

+13 −4
Original line number Diff line number Diff line
@@ -31,17 +31,26 @@ static const struct pin_config pinconf[] = { 
	{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA},

#endif /* CONFIG_I2C_3 */

#ifdef CONFIG_SPI_1

	{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},

	{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},

	{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS |

			STM32_OSPEEDR_VERY_HIGH_SPEED},

	{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK |

			STM32_OSPEEDR_VERY_HIGH_SPEED},

	{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},

	{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},

#endif	/* CONFIG_SPI_1 */

#ifdef CONFIG_SPI_2

	{STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS},

	{STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_SPI2_SCK},

	{STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS |

			STM32_OSPEEDR_VERY_HIGH_SPEED},

	{STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_SPI2_SCK |

			STM32_OSPEEDR_VERY_HIGH_SPEED},

	{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},

	{STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI},

#endif	/* CONFIG_SPI_2 */

#ifdef CONFIG_I2S_5

	{STM32_PIN_PB0, STM32F4_PINMUX_FUNC_PB0_I2S5_CK |

			STM32_OSPEEDR_VERY_HIGH_SPEED},

	{STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2S5_SD},

#endif	/* CONFIG_I2S_5 */

};



static int pinmux_stm32_init(struct device *port)

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