Commit 75f5d980 authored Apr 03, 2024 by Marcin Szymczyk Committed by Carles Cufi Apr 22, 2024

soc: riscv-privileged: support SoCs without reset vector



RISCV_PRIVILEGED implicitly depends on INCLUDE_RESET_VECTOR.
Remove that dependency by adding support for SoCs that
do not need the `__reset` stub.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>

parent 030a8b18

soc/common/riscv-privileged/vector.S

+5 −0

Original line number	Diff line number	Diff line
		@@ -97,5 +97,10 @@ SECTION_FUNC(vectors, __start)

		#endif /* CONFIG_RISCV_VECTORED_MODE */

		#if CONFIG_INCLUDE_RESET_VECTOR
		/* Jump to __reset */
		tail __reset
		#else
		/* Jump to __initialize */
		tail __initialize
		#endif

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