Commit 6f698412 authored by Johan Hedberg's avatar Johan Hedberg Committed by Anas Nashif
Browse files

drivers: uart_qmsi: Re-enable HW FC for arduino_101 & quark_se_devboard 



On current Curie-based boards UART 0 is wired to the nRF51 BLE
controller and requires HW flow control to be enabled in order to
function. This patch restores the same behavior that was present
before the "qmsi: uart: use built-in qmsi driver" patch.

Change-Id: If7ea347f5ab8b460f39123dcc0d75d711a5a1c2a
Signed-off-by: default avatarJohan Hedberg <johan.hedberg@intel.com>
parent 15c1fed5

boards/arduino_101/arduino_101_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ CONFIG_UART_CONSOLE=y 
CONFIG_SERIAL=y

CONFIG_UART_QMSI=y

CONFIG_UART_QMSI_0_BAUDRATE=1000000

CONFIG_UART_QMSI_0_HW_FC=y

CONFIG_PRINTK=y

CONFIG_IPM=y

CONFIG_IPM_QUARK_SE=y

boards/quark_se_devboard/quark_se_devboard_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ CONFIG_CPU_MINUTEIA=y 
CONFIG_CONSOLE=y

CONFIG_UART_QMSI=y

CONFIG_UART_QMSI_0_BAUDRATE=1000000

CONFIG_UART_QMSI_0_HW_FC=y

CONFIG_UART_CONSOLE=y

CONFIG_SERIAL=y

CONFIG_PRINTK=y

drivers/serial/Kconfig.qmsi

+8 −0
Original line number Diff line number Diff line
@@ -29,6 +29,10 @@ config UART_QMSI_0_BAUDRATE 
	help

	  This option sets the baud rate from the UART_0 device.



config UART_QMSI_0_HW_FC

	depends on UART_QMSI_0

	bool "HW flow control for UART_0 controller"



config UART_QMSI_0_IRQ_PRI

	depends on UART_QMSI_0

	int "IRQ priority from UART_0 controller"
@@ -53,6 +57,10 @@ config UART_QMSI_1_BAUDRATE 
	help

	  This option sets the baud rate from the UART_1 device.



config UART_QMSI_1_HW_FC

	depends on UART_QMSI_1

	bool "HW flow control for UART_1 controller"



config UART_QMSI_1_IRQ_PRI

	depends on UART_QMSI_1

	int "IRQ priority from UART_1 controller"

drivers/serial/uart_qmsi.c

+8 −1
Original line number Diff line number Diff line
@@ -42,6 +42,7 @@ struct uart_qmsi_config_info { 
	qm_uart_t instance;

	clk_periph_t clock_gate;

	uint32_t baud_divisor;

	bool hw_fc;



#ifdef CONFIG_UART_INTERRUPT_DRIVEN

	uart_irq_config_func_t irq_config_func;
@@ -67,6 +68,9 @@ static struct uart_qmsi_config_info config_info_0 = { 
				DIVISOR_HIGH(CONFIG_UART_QMSI_0_BAUDRATE),

				DIVISOR_LOW(CONFIG_UART_QMSI_0_BAUDRATE),

				0),

#ifdef CONFIG_UART_QMSI_0_HW_FC

	.hw_fc = true,

#endif



#ifdef CONFIG_UART_INTERRUPT_DRIVEN

	.irq_config_func = irq_config_func_0,
@@ -91,6 +95,9 @@ static struct uart_qmsi_config_info config_info_1 = { 
				DIVISOR_HIGH(CONFIG_UART_QMSI_1_BAUDRATE),

				DIVISOR_LOW(CONFIG_UART_QMSI_1_BAUDRATE),

				0),

#ifdef CONFIG_UART_QMSI_1_HW_FC

	.hw_fc = true,

#endif



#ifdef CONFIG_UART_INTERRUPT_DRIVEN

	.irq_config_func = irq_config_func_1,
@@ -366,7 +373,7 @@ static int uart_qmsi_init(struct device *dev) 


	cfg.line_control = QM_UART_LC_8N1;

	cfg.baud_divisor = config->baud_divisor;

	cfg.hw_fc = false;

	cfg.hw_fc = config->hw_fc;

	cfg.int_en = false;



	clk_periph_enable(config->clock_gate);

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