Commit 6c0c6901 authored by Muhammed Asif's avatar Muhammed Asif Committed by Anas Nashif
Browse files

dts: gpio: microchip: add gpio dts node and bindings for Port g1 IPs



Add gpio binding file for Microchip Port g1 IPs and
add gpio node in dtsi files.

Signed-off-by: default avatarMuhammed Asif <muhammed.asif@microchip.com>
Signed-off-by: default avatarMohamed Azhar <mohamed.azhar@microchip.com>
parent df2a0e53
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+9 −0
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@@ -7,6 +7,7 @@
/* Common SoC definitions shared across all PIC32CM JH devices */

#include <arm/armv6-m.dtsi>
#include <zephyr/dt-bindings/gpio/gpio.h>

/ {
	cpus {
@@ -36,6 +37,14 @@
		sram0: memory@20000000 {
			compatible = "mmio-sram";
		};

		porta: gpio@41000000 {
			compatible = "microchip,port-g1-gpio";
			reg = <0x41000000 0x80>;
			gpio-controller;
			#gpio-cells = <2>;
			#microchip,pin-cells = <2>;
		};
	};
};

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@@ -7,3 +7,23 @@
/* Device-tree nodes specific to 100-pin package variants */

#include <microchip/pic32c/pic32cm_jh/common/pic32cm_jh.dtsi>

/ {
	soc {
		portb: gpio@41000080 {
			compatible = "microchip,port-g1-gpio";
			reg = <0x41000080 0x80>;
			gpio-controller;
			#gpio-cells = <2>;
			#microchip,pin-cells = <2>;
		};

		portc: gpio@41000100 {
			compatible = "microchip,port-g1-gpio";
			reg = <0x41000100 0x80>;
			gpio-controller;
			#gpio-cells = <2>;
			#microchip,pin-cells = <2>;
		};
	};
};
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@@ -7,3 +7,15 @@
/* Device-tree nodes specific to 48-pin package variants */

#include <microchip/pic32c/pic32cm_jh/common/pic32cm_jh.dtsi>

/ {
	soc {
		portb: gpio@41000080 {
			compatible = "microchip,port-g1-gpio";
			reg = <0x41000080 0x80>;
			gpio-controller;
			#gpio-cells = <2>;
			#microchip,pin-cells = <2>;
		};
	};
};
+12 −0
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@@ -7,3 +7,15 @@
/* Device-tree nodes specific to 64-pin package variants */

#include <microchip/pic32c/pic32cm_jh/common/pic32cm_jh.dtsi>

/ {
	soc {
		portb: gpio@41000080 {
			compatible = "microchip,port-g1-gpio";
			reg = <0x41000080 0x80>;
			gpio-controller;
			#gpio-cells = <2>;
			#microchip,pin-cells = <2>;
		};
	};
};
+39 −0
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# Copyright (c) 2025 Microchip Technology Inc.
# SPDX-License-Identifier: Apache-2.0

title: Microchip Port G1 GPIO

description: |
  GPIO controller for the Microchip Port Group 1 (G1)

  Group g1 PORT GPIO driver supports following hardware peripherals:
    - module name="PORT" id="U2210" version="2.2.0"
    - module name="PORT" id="U2210" version="3.1.0"

compatible: "microchip,port-g1-gpio"

include:
  - name: base.yaml
  - name: gpio-controller.yaml

properties:
  reg:
    required: true

  "#gpio-cells":
    const: 2

  "#microchip,pin-cells":
    type: int
    required: true
    const: 2
    description: |
      Number of items to expect in a microchip,pins specifier

gpio-cells:
  - pin
  - flags

microchip,pin-cells:
  - pin
  - peripheral