Commit 6b740b20 authored by Daniel Leung's avatar Daniel Leung Committed by Fabio Baltieri
Browse files

riscv: renames shadow variables 



In print_pmp_entries(), start and end are function arguments
and yet another start and end are declared inside the for
loop. So rename the function arguments to fix shadow variables
warning.

The changes in csr_*() macros are needed to avoid shadowing
__v when nesting those functions together, for example,
csr_write(..., csr_read(...)).

Signed-off-by: default avatarDaniel Leung <daniel.leung@intel.com>
parent 88c43566

arch/riscv/core/pmp.c

+2 −2
Original line number Diff line number Diff line
@@ -56,7 +56,7 @@ LOG_MODULE_REGISTER(mpu); 


#define PMP_NONE 0



static void print_pmp_entries(unsigned int start, unsigned int end,

static void print_pmp_entries(unsigned int pmp_start, unsigned int pmp_end,

			      unsigned long *pmp_addr, unsigned long *pmp_cfg,

			      const char *banner)

{
@@ -64,7 +64,7 @@ static void print_pmp_entries(unsigned int start, unsigned int end, 
	unsigned int index;



	LOG_DBG("PMP %s:", banner);

	for (index = start; index < end; index++) {

	for (index = pmp_start; index < pmp_end; index++) {

		unsigned long start, end, tmp;



		switch (pmp_n_cfg[index] & PMP_A) {

include/zephyr/arch/riscv/csr.h

+15 −15
Original line number Diff line number Diff line
@@ -184,52 +184,52 @@ 


#define csr_read(csr)						\

({								\

	register unsigned long __v;				\

	register unsigned long __rv;				\

	__asm__ volatile ("csrr %0, " STRINGIFY(csr)		\

				: "=r" (__v));			\

	__v;							\

				: "=r" (__rv));			\

	__rv;							\

})



#define csr_write(csr, val)					\

({								\

	unsigned long __v = (unsigned long)(val);		\

	unsigned long __wv = (unsigned long)(val);		\

	__asm__ volatile ("csrw " STRINGIFY(csr) ", %0"		\

				: : "rK" (__v)			\

				: : "rK" (__wv)			\

				: "memory");			\

})





#define csr_read_set(csr, val)					\

({								\

	unsigned long __v = (unsigned long)(val);		\

	unsigned long __rsv = (unsigned long)(val);		\

	__asm__ volatile ("csrrs %0, " STRINGIFY(csr) ", %1"	\

				: "=r" (__v) : "rK" (__v)	\

				: "=r" (__rsv) : "rK" (__rsv)	\

				: "memory");			\

	__v;							\

	__rsv;							\

})



#define csr_set(csr, val)					\

({								\

	unsigned long __v = (unsigned long)(val);		\

	unsigned long __sv = (unsigned long)(val);		\

	__asm__ volatile ("csrs " STRINGIFY(csr) ", %0"		\

				: : "rK" (__v)			\

				: : "rK" (__sv)			\

				: "memory");			\

})



#define csr_read_clear(csr, val)				\

({								\

	unsigned long __v = (unsigned long)(val);		\

	unsigned long __rcv = (unsigned long)(val);		\

	__asm__ volatile ("csrrc %0, " STRINGIFY(csr) ", %1"	\

				: "=r" (__v) : "rK" (__v)	\

				: "=r" (__rcv) : "rK" (__rcv)	\

				: "memory");			\

	__v;							\

	__rcv;							\

})



#define csr_clear(csr, val)					\

({								\

	unsigned long __v = (unsigned long)(val);		\

	unsigned long __cv = (unsigned long)(val);		\

	__asm__ volatile ("csrc " STRINGIFY(csr) ", %0"		\

				: : "rK" (__v)			\

				: : "rK" (__cv)			\

				: "memory");			\

})

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