Commit 6b167f25 authored by Fabrice DJIATSA's avatar Fabrice DJIATSA Committed by Fabio Baltieri
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drivers: clock_control: add calibration for h7 pllx_hsi



This will calibrate the HSI's PLLX clocks if enabled
The value rcc_hsicalibartion_default is 0x40U for h7/h7rs.

Signed-off-by: default avatarFabrice DJIATSA <fabrice.djiatsa-ext@st.com>
parent 0ae12adc
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+12 −3
Original line number Diff line number Diff line
@@ -675,9 +675,18 @@ static void set_up_fixed_clock_sources(void)
	}

	if (IS_ENABLED(STM32_HSI_ENABLED)) {
		if (IS_ENABLED(STM32_PLL_SRC_HSI) || IS_ENABLED(STM32_PLL2_SRC_HSI) ||
+		    IS_ENABLED(STM32_PLL3_SRC_HSI)) {
			/* HSI calibration */
			LL_RCC_HSI_SetCalibTrimming(RCC_HSICALIBRATION_DEFAULT);
		}
		/* Enable HSI if not enabled */
		if (LL_RCC_HSI_IsReady() != 1) {
			/* Enable HSI oscillator */
			LL_RCC_HSI_Enable();
			while (LL_RCC_HSI_IsReady() != 1) {
			/* Wait for HSI ready */
			}
		}
		/* HSI divider configuration */
		LL_RCC_HSI_SetDivider(hsi_divider(STM32_HSI_DIVISOR));