Commit 64dd04f7 authored by Hou Zhiqiang's avatar Hou Zhiqiang Committed by David Leach
Browse files

dts: imx8m: add device node for RDC 



Add RDC device tree node for i.MX8M SoCs Cortex-A core dtsi.

Signed-off-by: default avatarHou Zhiqiang <Zhiqiang.Hou@nxp.com>
parent d81162e0

dts/arm64/nxp/nxp_mimx8mm_a53.dtsi

+6 −1
Original line number Diff line number Diff line 
/*

 * Copyright 2020-2022 NXP

 * Copyright 2020-2022,2024 NXP

 *

 * SPDX-License-Identifier: Apache-2.0

 */
@@ -111,4 +111,9 @@ 
		clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>;

		status = "disabled";

	};



	rdc: rdc@303d0000 {

		compatible = "nxp,rdc";

		reg = <0x303d0000 DT_SIZE_K(64)>;

	};

};

dts/arm64/nxp/nxp_mimx8mn_a53.dtsi

+6 −1
Original line number Diff line number Diff line 
/*

 * Copyright 2022 NXP

 * Copyright 2022,2024 NXP

 *

 * SPDX-License-Identifier: Apache-2.0

 */
@@ -111,4 +111,9 @@ 
		clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>;

		status = "disabled";

	};



	rdc: rdc@303d0000 {

		compatible = "nxp,rdc";

		reg = <0x303d0000 DT_SIZE_K(64)>;

	};

};

dts/arm64/nxp/nxp_mimx8mp_a53.dtsi

+6 −1
Original line number Diff line number Diff line 
/*

 * Copyright 2020-2022 NXP

 * Copyright 2020-2022,2024 NXP

 *

 * SPDX-License-Identifier: Apache-2.0

 */
@@ -106,5 +106,10 @@ 
				compatible = "nxp,imx8mp-pinctrl";

			};

		};



		rdc: rdc@303d0000 {

			compatible = "nxp,rdc";

			reg = <0x303d0000 DT_SIZE_K(64)>;

		};

	};

};

CRA Git | Maintained and supported by SUSTech CRA and CCSE