drivers/i2c: it51xxx: Refactor ISR to reduce clock stretch in PIO mode

Move handling of write-to-clear status and stop detect to the
beginning of the ISR for PIO mode to reduce unnecessary clock
stretching and improve responsiveness during transfers.

This patch also separates status clearing for shared FIFO mode,
ensuring it is done at the appropriate point after data handling
completes, maintaining correct transfer behavior.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>