adsp: hda: accept 16 byte alignment for HDA buffer size

HDA DMA driver uses an excessive value of 128 bytes as required alignment
for DMA buffer size. This may result in the correct buffer size (e.g.
32-byte aligned, which is DT-compliant) being silently truncated before
writing it into DGBS register. This patch changes the requirement to the
value implied by DGBS register format (effectively reduces to 16 bytes).

Signed-off-by: Tomasz Lissowski <tomasz.lissowski@intel.com>