Commit 5a4d714d authored by Tony Han's avatar Tony Han Committed by Benjamin Cabé
Browse files

soc: microchip: sam-clk: optimize get_rate() for generic clocks 



Obtain generic clock division ratio from the register instead of
from the variable to avoid wrong result caused by un-synced
division ratios.

Signed-off-by: default avatarTony Han <tony.han@microchip.com>
parent a8cf6967

soc/microchip/sam/common/clk-generated.c

+2 −0
Original line number Diff line number Diff line
@@ -135,6 +135,8 @@ static int clk_generated_get_rate(const struct device *dev, 
		LOG_ERR("get parent clock rate failed.");

		return ret;

	}



	gck->gckdiv = FIELD_GET(PMC_PCR_GCLKDIV_Msk, status);

	*rate /= (gck->gckdiv + 1);



	return 0;

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