Commit 596cd869 authored by Evgeniy Paltsev's avatar Evgeniy Paltsev Committed by Maureen Helm
Browse files

ARC: sys_io: rewrite to C code 



Replace ASM sys_io implementation with identical C code for ARC.
This significantly improves portability, i.e. compiler decides
which instructions to use for a particular CPU and / or
configuration.

Signed-off-by: default avatarEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
parent d67475ab

include/arch/arc/v2/sys_io.h

+34 −45
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 


#ifndef _ASMLANGUAGE



#include <toolchain.h>

#include <sys/sys_io.h>

#include <arch/arc/v2/aux_regs.h>
@@ -125,70 +126,58 @@ static ALWAYS_INLINE 
	return ret;

}



static ALWAYS_INLINE

	void sys_write8(uint8_t data, mm_reg_t addr)

static ALWAYS_INLINE uint8_t sys_read8(mem_addr_t addr)

{

	__asm__ volatile("stb%U1	%0, %1;\n\t"

			 :

			 : "r" (data), "m" (*(volatile uint8_t *) addr)

			 : "memory");

}

	uint8_t value;



static ALWAYS_INLINE

	uint8_t sys_read8(mm_reg_t addr)

{

	uint8_t ret;

	compiler_barrier();

	value = *(volatile uint8_t *)addr;

	compiler_barrier();



	__asm__ volatile("ldb%U1	%0, %1;\n\t"

			 : "=r" (ret)

			 : "m" (*(volatile uint8_t *) addr)

			 : "memory");



	return ret;

	return value;

}



static ALWAYS_INLINE

	void sys_write16(uint16_t data, mm_reg_t addr)

static ALWAYS_INLINE void sys_write8(uint8_t data, mem_addr_t addr)

{

	__asm__ volatile("sth%U1	%0, %1;\n\t"

			 :

			 : "r" (data), "m" (*(volatile uint16_t *) addr)

			 : "memory");

	compiler_barrier();

	*(volatile uint8_t *)addr = data;

	compiler_barrier();

}



static ALWAYS_INLINE

	uint16_t sys_read16(mm_reg_t addr)

static ALWAYS_INLINE uint16_t sys_read16(mem_addr_t addr)

{

	uint16_t ret;

	uint16_t value;



	__asm__ volatile("ldh%U1	%0, %1;\n\t"

			 : "=r" (ret)

			 : "m" (*(volatile uint16_t *) addr)

			 : "memory");

	compiler_barrier();

	value = *(volatile uint16_t *)addr;

	compiler_barrier();



	return ret;

	return value;

}



static ALWAYS_INLINE

	void sys_write32(uint32_t data, mm_reg_t addr)

static ALWAYS_INLINE void sys_write16(uint16_t data, mem_addr_t addr)

{

	__asm__ volatile("st%U1	%0, %1;\n\t"

			 :

			 : "r" (data), "m" (*(volatile uint32_t *) addr)

			 : "memory");

	compiler_barrier();

	*(volatile uint16_t *)addr = data;

	compiler_barrier();

}



static ALWAYS_INLINE

	uint32_t sys_read32(mm_reg_t addr)

static ALWAYS_INLINE uint32_t sys_read32(mem_addr_t addr)

{

	uint32_t ret;

	uint16_t value;



	__asm__ volatile("ld%U1	%0, %1;\n\t"

			 : "=r" (ret)

			 : "m" (*(volatile uint32_t *) addr)

			 : "memory");

	compiler_barrier();

	value = *(volatile uint32_t *)addr;

	compiler_barrier();



	return ret;

	return value;

}



static ALWAYS_INLINE void sys_write32(uint32_t data, mem_addr_t addr)

{

	compiler_barrier();

	*(volatile uint32_t *)addr = data;

	compiler_barrier();

}



#ifdef __cplusplus

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