arch: riscv: Add Zc* compressed instruction extension support

This commit adds the support for the following new Zc* series compressed
instruction extensions:

  Zca  - Subset of the C extension without FP loads and stores
  Zcb  - "Simple" instructions
  Zcd  - Double-precision floating-point instructions
  Zcf  - Single-precision floating-point instructions
  Zcmp - "Complex" instructions for embedded CPUs
  Zcmt - Table jump instructions for embedded CPUs

With the introduction of the Zc* extensions, the C extension now implies
the following Zc* extensions:

  * Zca, always
  * Zcf if F is specified (RV32 only)
  * Zcd if D is specified

The Zc* extensions that are implied by the C extension are not specified in
the GCC `-march` flag because they are redundant and can interfere with the
resolution of the correct multi-lib for the selected architecture unless
the the alternate mappings for the redundant forms are manually specified.

All the implementation details in this commit are based on the Zc* v1.0.0
specification, which is the ratified version.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>