Commit 56b6e575 authored by Jonathan Nilsen's avatar Jonathan Nilsen Committed by Fabio Baltieri
Browse files

soc: nordic: add IronSide SE compatible UICR support



Add support for generating UICR and associated artifacts in a
format compatible with IronSide SE, to be used for Nordic SoCs
in the Haltium family.

The main feature added with this is the ability to configure certain
global domain peripherals that are managed by the secure domain
through setting UICR.PERIPHCONF. This register points at a blob of
(register address, register value) pairs which are loaded
into the peripherals by IronSide SE ahead of the application boot.

The added helper macros in uicr.h can be used to add register
configurations to the PERIPHCONF. Entries added through these macros
are then extracted by a script, post-processed and placed in a blob
located at specific part of MRAM.

A default PERIPHCONF configuration has been added for the nrf54h20
soc to support the standard BLE use case (matching the configuration
in the soc devicetree).

Signed-off-by: default avatarJonathan Nilsen <jonathan.nilsen@nordicsemi.no>
parent b43ae17f
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+4 −0
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@@ -162,5 +162,9 @@
		storage_partition: partition@1a4000 {
			reg = <0x1a4000 DT_SIZE_K(40)>;
		};

		periphconf_partition: partition@1ae000 {
			reg = <0x1ae000 DT_SIZE_K(8)>;
		};
	};
};
+4 −0
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@@ -3,6 +3,10 @@

add_subdirectory_ifdef(CONFIG_RISCV_CORE_NORDIC_VPR vpr)

if(CONFIG_NRF_PERIPHCONF_SECTION OR CONFIG_NRF_HALTIUM_GENERATE_UICR)
  add_subdirectory(uicr)
endif()

# Let SystemInit() be called in place of soc_reset_hook() by default.
zephyr_linker_symbol(SYMBOL soc_reset_hook EXPR "@SystemInit@")

+1 −0
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@@ -49,3 +49,4 @@ source "subsys/logging/Kconfig.template.log_config"
endif # MRAM_LATENCY

rsource "vpr/Kconfig"
rsource "uicr/Kconfig"
+36 −0
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# Copyright (c) 2025 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0

if(CONFIG_NRF_PERIPHCONF_SECTION)
  zephyr_linker_sources(SECTIONS uicr.ld)
endif()

if(CONFIG_NRF_HALTIUM_GENERATE_UICR)
  if(CONFIG_NRF_PERIPHCONF_SECTION)
    set(in_periphconf_elf_arg
      --in-periphconf-elf $<TARGET_FILE:${ZEPHYR_LINK_STAGE_EXECUTABLE}>
    )
  endif()

  if(CONFIG_NRF_HALTIUM_UICR_PERIPHCONF)
    set(periphconf_hex_file ${PROJECT_BINARY_DIR}/periphconf.hex)
    set(out_periphconf_hex_arg
      --out-periphconf-hex ${periphconf_hex_file}
    )
    list(APPEND optional_byproducts ${periphconf_hex_file})
  endif()

  set(uicr_hex_file ${PROJECT_BINARY_DIR}/uicr.hex)
  set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
    COMMAND ${CMAKE_COMMAND} -E env PYTHONPATH=${ZEPHYR_BASE}/scripts/dts/python-devicetree/src
    ${PYTHON_EXECUTABLE} ${CMAKE_CURRENT_LIST_DIR}/gen_uicr.py
    --in-config ${DOTCONFIG}
    --in-edt-pickle ${EDT_PICKLE}
    ${in_periphconf_elf_arg}
    ${out_periphconf_hex_arg}
    --out-uicr-hex ${uicr_hex_file}
  )
  set_property(GLOBAL APPEND PROPERTY extra_post_build_byproducts
    ${uicr_hex_file} ${optional_byproducts}
  )
endif()
+31 −0
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# Copyright (c) 2025 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0

config NRF_HALTIUM_GENERATE_UICR
	bool "Generate UICR file"
	depends on SOC_NRF54H20_CPUAPP
	default y
	help
	  Generate UICR HEX file.

if NRF_HALTIUM_GENERATE_UICR

config NRF_HALTIUM_UICR_PERIPHCONF
	bool "Initialize global domain peripherals"
	default y
	help
	  Generates a blob containing static global domain peripheral initialization
	  values extracted from the build artifacts, and configures UICR.PERIPHCONF
	  to point at the blob. The initialization values are then loaded ahead of
	  ahead of the application boot.

endif

config NRF_PERIPHCONF_SECTION
	bool "Populate global peripheral initialization section"
	default y if SOC_NRF54H20_CPUAPP
	depends on LINKER_DEVNULL_SUPPORT
	imply LINKER_DEVNULL_MEMORY
	help
	  Include static global domain peripheral initialization values from the
	  build in a dedicated section in the devnull region.
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