Commit 55914da0 authored by Andrew Boie's avatar Andrew Boie Committed by Anas Nashif
Browse files

boards: add qemu_x86_nopae target 



We added support for 32-bit page tables, without PAE.
Add a build target to ensure it doesn't bit-rot.

Signed-off-by: default avatarAndrew Boie <andrew.p.boie@intel.com>
parent 4b3f50b5

boards/x86/qemu_x86/qemu_x86_nopae.dts

0 → 100644
+7 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2020 Intel Corporation

 *

 * SPDX-License-Identifier: Apache-2.0

 */



#include "qemu_x86.dts"

boards/x86/qemu_x86/qemu_x86_nopae.yaml

0 → 100644
+13 −0
Original line number Diff line number Diff line 
identifier: qemu_x86_nopae

name: QEMU Emulation for X86 (32-bit page tables)

type: qemu

arch: x86

simulation: qemu

toolchain:

  - zephyr

  - xtools

testing:

  default: true

  only_tags:

     - kernel

     - userspace

boards/x86/qemu_x86/qemu_x86_nopae_defconfig

0 → 100644
+21 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: Apache-2.0



CONFIG_SOC_IA32=y

CONFIG_BOARD_QEMU_X86=y

CONFIG_HPET_TIMER=y

CONFIG_PIC_DISABLE=y

CONFIG_LOAPIC=y

CONFIG_CONSOLE=y

CONFIG_SERIAL=y

CONFIG_UART_NS16550=y

CONFIG_UART_CONSOLE=y

CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000

CONFIG_TEST_RANDOM_GENERATOR=y

CONFIG_X86_MMU=y

CONFIG_X86_MMU_PAGE_POOL_PAGES=15

CONFIG_DEBUG_INFO=y

CONFIG_SCHED_SCALABLE=y

CONFIG_WAITQ_SCALABLE=y

CONFIG_X86_VERY_EARLY_CONSOLE=y

CONFIG_QEMU_ICOUNT_SHIFT=5

CONFIG_X86_PAE=n

CRA Git | Maintained and supported by SUSTech CRA and CCSE