Commit 54239d50 authored by Savinay Dharmappa's avatar Savinay Dharmappa Committed by Kumar Gala
Browse files

dts: x86: Add interrupt controller node 



patch adds interrupt controller node and interrupt
property for device nodes.

Signed-off-by: default avatarSavinay Dharmappa <savinay.dharmappa@intel.com>
parent 8447b5ea

boards/x86/arduino_101/dts.fixup

+2 −0
Original line number Diff line number Diff line
@@ -7,3 +7,5 @@ 
#define CONFIG_PHYS_RAM_ADDR		CONFIG_SRAM_BASE_ADDRESS



#define CONFIG_PHYS_LOAD_ADDR		CONFIG_FLASH_BASE_ADDRESS



#define CONFIG_IOAPIC_BASE_ADDRESS	INTEL_IOAPIC_FEC00000_BASE_ADDRESS

boards/x86/galileo/dts.fixup

+2 −0
Original line number Diff line number Diff line
@@ -9,3 +9,5 @@ 
#define CONFIG_PHYS_RAM_ADDR			CONFIG_SRAM_BASE_ADDRESS



#define CONFIG_PHYS_LOAD_ADDR			CONFIG_FLASH_BASE_ADDRESS



#define CONFIG_IOAPIC_BASE_ADDRESS		INTEL_IOAPIC_FEC00000_BASE_ADDRESS

boards/x86/minnowboard/dts.fixup

+2 −0
Original line number Diff line number Diff line
@@ -9,3 +9,5 @@ 
#define CONFIG_PHYS_RAM_ADDR			CONFIG_SRAM_BASE_ADDRESS



#define CONFIG_PHYS_LOAD_ADDR			CONFIG_FLASH_BASE_ADDRESS



#define CONFIG_IOAPIC_BASE_ADDRESS		INTEL_IOAPIC_FEC00000_BASE_ADDRESS

boards/x86/qemu_x86/dts.fixup

+2 −0
Original line number Diff line number Diff line
@@ -9,3 +9,5 @@ 
#define CONFIG_PHYS_RAM_ADDR			CONFIG_SRAM_BASE_ADDRESS



#define CONFIG_PHYS_LOAD_ADDR			CONFIG_FLASH_BASE_ADDRESS



#define CONFIG_IOAPIC_BASE_ADDRESS		INTEL_IOAPIC_FEC00000_BASE_ADDRESS

boards/x86/quark_se_c1000_devboard/dts.fixup

+2 −0
Original line number Diff line number Diff line
@@ -7,3 +7,5 @@ 
#define CONFIG_PHYS_RAM_ADDR		CONFIG_SRAM_BASE_ADDRESS



#define CONFIG_PHYS_LOAD_ADDR		CONFIG_FLASH_BASE_ADDRESS



#define CONFIG_IOAPIC_BASE_ADDRESS	INTEL_IOAPIC_FEC00000_BASE_ADDRESS

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