Commit 4bd59353 authored by Tomasz Bursztyka's avatar Tomasz Bursztyka Committed by Carles Cufi
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dts/bindings: Add a dedicated property for duplex mode on SPI device



Users will have to include dt-bindings/spi/spi.h in order to use the
relevant flags fol this property. For instance:

    ...
    duplex = <SPI_HALF_DUPLEX>;
    ....

By default all SPI device are configured to be full duplex so the
property is optional. This property makes sense only for devices that
can be configured on either modes. Which, in such case, it will need to
use DT_INST_PROP(<instance number>, duplex) macro call to retrieve the
property value. Others can fully ignore it.

Signed-off-by: default avatarTomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
parent 01b9813d
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+13 −0
Original line number Diff line number Diff line
@@ -16,3 +16,16 @@ properties:
      description: Maximum clock frequency of device's SPI interface in Hz
    label:
      required: true
    duplex:
      type: int
      required: false
      description: |
        Duplex mode, full or half. By default it's always full duplex thus 0
        as this is, by far, the most common mode.
        Use the macros not the actual enum value, here is the concordance
        list (see dt-bindings/spi/spi.h)
          0    SPI_FULL_DUPLEX
          2048 SPI_HALF_DUPLEX
      enum:
        - 0
        - 2048
+1 −9
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@
#include <zephyr/types.h>
#include <stddef.h>
#include <device.h>
#include <dt-bindings/spi/spi.h>
#include <drivers/gpio.h>

#ifdef __cplusplus
@@ -84,15 +85,6 @@ extern "C" {
#define SPI_WORD_SET(_word_size_)		\
	((_word_size_) << SPI_WORD_SIZE_SHIFT)

/**
 * @brief SPI duplex modes
 *
 * Some controllers support half duplex transfer, which results in 3-wire usage.
 * By default, full duplex will prevail.
 */
#define SPI_FULL_DUPLEX		(0U << 11)
#define SPI_HALF_DUPLEX		(1U << 11)

/**
 * @brief Specific SPI devices control bits
 */
+29 −0
Original line number Diff line number Diff line
/*
 * Copyright (c) 2021 Intel Corporation
 *
 * SPDX-License-Identifier: Apache-2.0
 */
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_SPI_SPI_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_SPI_SPI_H_

/**
 * @brief SPI Interface
 * @defgroup spi_interface SPI Interface
 * @ingroup io_interfaces
 * @{
 */

/**
 * @brief SPI duplex mode
 *
 * Some controllers support half duplex transfer, which results in 3-wire usage.
 * By default, full duplex will prevail.
 */
#define SPI_FULL_DUPLEX		(0U << 11)
#define SPI_HALF_DUPLEX		(1U << 11)

/**
 * @}
 */

#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_SPI_SPI_H_ */