Commit 40a0d3c1 authored by Francois Ramu's avatar Francois Ramu Committed by Carles Cufi
Browse files

boards: stm32 boards with LPTIM node has CONFIG_STM32_LPTIM_CLOCK defined



Define the CONFIG_STM32_LPTIM_CLOCK_LSE when the board DTS
has STM32_SRC_LSE has lptim clock source.
CONFIG_STM32_LPTIM_CLOCK_LSI is defined by default.
The CONFIG_SYS_CLOCK_TICKS_PER_SEC is set by soc/arm/st_stm32/common/
Kconfig.defconfig.series.

Signed-off-by: default avatarFrancois Ramu <francois.ramu@st.com>
parent 3d4208d1
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+0 −4
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@@ -16,8 +16,4 @@ config SPI_STM32_INTERRUPT
config USE_DT_CODE_PARTITION
	default y if TRUSTED_EXECUTION_NONSECURE

# LPTIM clocked by LSE, force tick freq to 4096 for tick accuracy
config SYS_CLOCK_TICKS_PER_SEC
	default 4096 if STM32_LPTIM_TIMER

endif # BOARD_B_U585I_IOT02A
+3 −0
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@@ -18,3 +18,6 @@ CONFIG_UART_CONSOLE=y

# enable pin controller
CONFIG_PINCTRL=y

# LSE defined as LPTIM clock source by the DTS
CONFIG_STM32_LPTIM_CLOCK_LSE=y
+3 −0
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@@ -22,3 +22,6 @@ CONFIG_PINCTRL=y
CONFIG_ARM_TRUSTZONE_M=y
CONFIG_RUNTIME_NMI=y
CONFIG_TRUSTED_EXECUTION_NONSECURE=y

# LSE defined as LPTIM clock source by the DTS
CONFIG_STM32_LPTIM_CLOCK_LSE=y
+0 −4
Original line number Diff line number Diff line
@@ -8,10 +8,6 @@ if BOARD_DISCO_L475_IOT1
config BOARD
	default "disco_l475_iot1"

# LPTIM clocked by LSE, force tick freq to 4096 for tick accuracy
config SYS_CLOCK_TICKS_PER_SEC
	default 4096 if STM32_LPTIM_TIMER

config SPI_STM32_INTERRUPT
	default y
	depends on SPI
+3 −0
Original line number Diff line number Diff line
@@ -26,3 +26,6 @@ CONFIG_HW_STACK_PROTECTION=y

# enable pin controller
CONFIG_PINCTRL=y

# LSE defined as LPTIM clock source by the DTS
CONFIG_STM32_LPTIM_CLOCK_LSE=y
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