Commit 2ee1862a authored by Francois Ramu's avatar Francois Ramu Committed by Carles Cufi
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dts: arm: stm32H5 serie has FDCAN peripherals 



Add the FDCAN peripheral to the stm32H5 serie.
Two CAN1 & 2 instances for the stm32H56x/H57x devices.

Signed-off-by: default avatarFrancois Ramu <francois.ramu@st.com>
parent 4602070a

dts/arm/st/h5/stm32h5.dtsi

+26 −0
Original line number Diff line number Diff line
@@ -403,6 +403,32 @@ 
			status = "disabled";

		};



		can {

			compatible = "bosch,m_can-base";

			#address-cells = <1>;

			#size-cells = <1>;

			std-filter-elements = <28>;

			ext-filter-elements = <8>;

			rx-fifo0-elements = <3>;

			rx-fifo1-elements = <3>;

			rx-buffer-elements = <0>;

			tx-buffer-elements = <3>;



			can1: can@4000a400 {

				compatible = "st,stm32-fdcan";

				reg = <0x4000a400 0x400>, <0x4000ac00 0x350>;

				reg-names = "m_can", "message_ram";

				interrupts = <39 0>, <40 0>;

				interrupt-names = "LINE_0", "LINE_1";

				clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000200>;

				status = "disabled";

				sjw = <1>;

				sample-point = <875>;

				sjw-data = <1>;

				sample-point-data = <875>;

			};

		};



		rng: rng@420c0800 {

			compatible = "st,stm32-rng";

			reg = <0x420c0800 0x400>;

dts/arm/st/h5/stm32h562.dtsi

+17 −0
Original line number Diff line number Diff line
@@ -243,5 +243,22 @@ 
				status = "disabled";

			};

		};



		can {

			can2: can@4000a800 {

				compatible = "st,stm32-fdcan";

				reg = <0x4000a800 0x400>, <0x4000af50 0x350>;

				reg-names = "m_can", "message_ram";

				interrupts = <109 0>, <110 0>;

				interrupt-names = "LINE_0", "LINE_1";

				/* common clock FDCAN 1 & 2 */

				clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000200>;

				status = "disabled";

				sjw = <1>;

				sample-point = <875>;

				sjw-data = <1>;

				sample-point-data = <875>;

			};

		};

	};

};

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