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Commit 2d223bdc authored by Alexandre Bourdiol's avatar Alexandre Bourdiol Committed by Christopher Friedt
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drivers: clock_control: stm32u5: rework MSIS as system clock source



Because on stm32u5 MSIS is the default clock after reset,
changing MSIS range means immediate frequency change.
Thus it is important to do it after flash latency change
in case of higher new frequency.

Signed-off-by: default avatarAlexandre Bourdiol <alexandre.bourdiol@st.com>
parent 20e46c24
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