dts: renesas: update dts node in SoC layer to support pwm on RX130. (26f9fdf3) · Commits · Wenxi XU / zephyr

dts/rx/renesas/rx130-common.dtsi

+140 −0

Original line number	Diff line number	Diff line
		@@ -10,6 +10,7 @@

		#include <mem.h>
		#include <zephyr/dt-bindings/clock/rx_clock.h>
		#include <zephyr/dt-bindings/pwm/rx_mtu_pwm.h>
		#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-rx.h>

		/ {
		@@ -599,6 +600,145 @@
		};
		};

		mtu2a: mtu@88680 {
		/* MTUs 0-5 share the same TSTR and TSYR */
		compatible = "renesas,rx-mtu2a";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x00088680 0x01>, <0x00088681 0x01>;
		reg-names = "TSTR", "TSYR";

		mtu0: mtu0@88700 {
		compatible = "renesas,rx-mtu";
		channel = <0>;
		interrupts = <114 1>, <115 1>, <116 1>, <117 3>, <118 4>;
		interrupt-names = "tgia", "tgib", "tgic", "tgid", "tgiv";
		clocks = <&pclkb MSTPA 9>;
		reg-names = "TCR", "TMDR", "TIOR", "TIER",
		"TSR", "TGR", "TCNT", "NFCR";
		reg = <0x00088700 0x01>,
		<0x00088701 0x01>,
		<0x00088702 0x02>,
		<0x00088704 0x01>,
		<0x00088705 0x01>,
		<0x00088708 0x8>,
		<0x00088706 0x02>,
		<0x00088690 0x01>;
		bit-idx = <0>;

		pwm {
		compatible = "renesas,rx-mtu-pwm";
		prescaler = <RX_MTU_PWM_SOURCE_DIV_16>;
		#pwm-cells = <3>;
		status = "disabled";
		};
		};

		mtu1: mtu1@88780 {
		compatible = "renesas,rx-mtu";
		channel = <1>;
		interrupts = <121 1>, <122 1>, <123 1>;
		interrupt-names = "tgia", "tgib", "tgiv";
		clocks = <&pclkb MSTPA 9>;
		reg = <0x00088780 0x01>,
		<0x00088781 0x01>,
		<0x00088782 0x01>,
		<0x00088784 0x01>,
		<0x00088785 0x01>,
		<0x00088788 0x4>,
		<0x00088786 0x02>,
		<0x00088691 0x01>;
		reg-names = "TCR", "TMDR", "TIOR", "TIER",
		"TSR", "TGR", "TCNT", "NFCR";
		bit-idx = <1>;

		pwm {
		compatible = "renesas,rx-mtu-pwm";
		prescaler = <RX_MTU_PWM_SOURCE_DIV_16>;
		#pwm-cells = <3>;
		status = "disabled";
		};
		};

		mtu2: mtu2@88800 {
		compatible = "renesas,rx-mtu";
		channel = <2>;
		interrupts = <125 1>, <126 1>, <127 1>;
		interrupt-names = "tgia", "tgib", "tgiv";
		clocks = <&pclkb MSTPA 9>;
		reg = <0x00088800 0x01>,
		<0x00088801 0x01>,
		<0x00088802 0x01>,
		<0x00088804 0x01>,
		<0x00088805 0x01>,
		<0x00088808 0x4>,
		<0x00088806 0x02>,
		<0x00088692 0x01>;
		reg-names = "TCR", "TMDR", "TIOR", "TIER",
		"TSR", "TGR", "TCNT", "NFCR";
		bit-idx = <2>;

		pwm {
		compatible = "renesas,rx-mtu-pwm";
		prescaler = <RX_MTU_PWM_SOURCE_DIV_1>;
		#pwm-cells = <3>;
		status = "disabled";
		};
		};

		mtu3: mtu3@88600 {
		compatible = "renesas,rx-mtu";
		channel = <3>;
		interrupts = <129 1>, <130 1>, <131 1>, <132 1>, <133 1>;
		interrupt-names = "tgia", "tgib", "tgic", "tgid", "tgiv";
		clocks = <&pclkb MSTPA 9>;
		reg = <0x00088600 0x01>,
		<0x00088602 0x01>,
		<0x00088604 0x02>,
		<0x00088608 0x01>,
		<0x0008862c 0x1>,
		<0x00088618 0x8>,
		<0x00088610 0x02>,
		<0x00088693 0x01>;
		reg-names = "TCR", "TMDR", "TIOR", "TIER",
		"TSR", "TGR", "TCNT", "NFCR";
		bit-idx = <6>;

		pwm {
		compatible = "renesas,rx-mtu-pwm";
		prescaler = <RX_MTU_PWM_SOURCE_DIV_1>;
		#pwm-cells = <3>;
		status = "disabled";
		};
		};

		mtu4: mtu4@88601 {
		compatible = "renesas,rx-mtu";
		channel = <4>;
		interrupts = <134 1>, <135 1>, <136 1>, <137 1>, <138 1>;
		interrupt-names = "tgia", "tgib", "tgic", "tgid", "tgiv";
		clocks = <&pclkb MSTPA 9>;
		reg = <0x00088601 0x01>,
		<0x00088603 0x01>,
		<0x00088606 0x02>,
		<0x00088609 0x01>,
		<0x0008862c 0x1>,
		<0x0008861c 0x8>,
		<0x00088612 0x02>,
		<0x00088694 0x01>;
		reg-names = "TCR", "TMDR", "TIOR", "TIER",
		"TSR", "TGR", "TCNT", "NFCR";
		bit-idx = <7>;

		pwm {
		compatible = "renesas,rx-mtu-pwm";
		prescaler = <RX_MTU_PWM_SOURCE_DIV_1>;
		#pwm-cells = <3>;
		status = "disabled";
		};
		};
		};

		sci9: sci9@8a120 {
		compatible = "renesas,rx-sci";
		interrupts = <235 1>, <236 1>, <237 1>, <234 1>;

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