boards: intel_s1000_crb: polish docs (1e788a51) · Commits · Wenxi XU / zephyr

boards/xtensa/intel_s1000_crb/doc/intel_s1000.rst

+12 −10

Original line number	Diff line number	Diff line
		.. _Intel_S1000:

		Intel S1000
		###########
		Intel S1000 CRB
		###############

		Overview
		********
		@@ -58,8 +58,7 @@ In order to download the installer and the core configuration, users need to
		have a registered account at https://tensilicatools.com.

		The toolchain installer and the core configuration can be downloaded by following
		the links at
		https://tensilicatools.com/platform/intel-sue-creek
		the links at `Tensillica Tools for Sue Creek`_

		Select version RF-2016.4 and download the archive. The archive contains the installer
		"Xplorer-6.0.4-linux-installer.bin" and the core configuration "X6H3SUE_2016_4".
		@@ -114,13 +113,16 @@ shell variable. Some more environment variables are also required (see below):
		export XTENSA_CORE=X6H3SUE_2016_4
		export XTENSA_SYSTEM=/opt/xtensa/XtDevTools/install/tools/RF-2016.4-linux/XtensaTools/config/
		export XTENSA_BUILD_PATHS=/opt/xtensa/XtDevTools/install/builds/
		export XTENSA_OCD_PATH=/opt/Tensilica/xocd-12.0.4
		export XTENSA_OCD_PATH=/opt/tensilica/xocd-12.0.4

		Programming and Debugging
		*************************

		Flashing
		========

		The usual ``flash`` target will work with the ``intel_s1000_crb`` board
		configuration. Here is an example for the :ref:`hello_world`
		configuration using JTAG. Here is an example for the :ref:`hello_world`
		application.

		.. zephyr-app-commands::
		@@ -172,7 +174,8 @@ settings in minicom and can be verified by pressing Ctrl-A Z P.
		Using JTAG
		==========

		For debugging, you can use a flyswatter2 to connect to the S1000 CRB.
		For debugging and flashing, you can use a flyswatter2 to connect to the Intel
		S1000 CRB.
		The pinouts for flyswatter2 and the corresponding pinouts for CRB are
		shown below. Note that pin 6 on CRB is left unconnected.

		@@ -207,9 +210,8 @@ However, we need to short 2 pins on Host Connector J3 via a 3.3k resistor
		(simple shorting without the resistor will also do) for debugging to work.
		Those 2 pins are Pin5 HOST_RST_N_LT_R) and Pin21 (+V_HOST_3P3_1P8).

		References
		**********

		.. target-notes::

		.. _`FT232 UART`: https://www.amazon.com/FT232RL-Serial-Converter-Adapter-Arduino/dp/B06XDH2VK9

		.. _Tensillica Tools for Sue Creek: https://tensilicatools.com/platform/intel-sue-creek

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