Commit 1b77402e authored by Phuc Pham's avatar Phuc Pham Committed by Benjamin Cabé
Browse files

dts: renesas: Add I2C support for Renesas RZ/A3UL, T2M, N2L, V2L 



Add I2C nodes to Renesas RZ/A3UL, T2M, N2L, V2L

Signed-off-by: default avatarPhuc Pham <phuc.pham.xr@bp.renesas.com>
Signed-off-by: default avatarNhut Nguyen <nhut.nguyen.kc@renesas.com>
parent ebf3aa05

dts/arm/renesas/rz/rzn/r9a07g084.dtsi

+46 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
#include <arm/armv8-r.dtsi>

#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>

#include <zephyr/dt-bindings/adc/adc.h>

#include <zephyr/dt-bindings/i2c/i2c.h>



/ {

	#address-cells = <1>;
@@ -1060,5 +1061,50 @@ 
				status = "disabled";

			};

		};



		i2c0: i2c@80043000 {

			compatible = "renesas,rz-iic";

			channel = <0>;

			clock-frequency = <I2C_BITRATE_STANDARD>;

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x80043000 0x400>;

			interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 309 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 310 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 311 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;

			interrupt-names = "eri", "rxi", "txi", "tei";

			status = "disabled";

		};



		i2c1: i2c@80043400 {

			compatible = "renesas,rz-iic";

			channel = <1>;

			clock-frequency = <I2C_BITRATE_STANDARD>;

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x80043400 0x400>;

			interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 313 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 314 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 315 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;

			interrupt-names = "eri", "rxi", "txi", "tei";

			status = "disabled";

		};



		i2c2: i2c@81008000 {

			compatible = "renesas,rz-iic";

			channel = <2>;

			clock-frequency = <I2C_BITRATE_STANDARD>;

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x81008000 0x400>;

			interrupts = <GIC_SPI 439 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 440 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 441 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 442 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;

			interrupt-names = "eri", "rxi", "txi", "tei";

			status = "disabled";

		};

	};

};

dts/arm/renesas/rz/rzt/r9a07g075.dtsi

+46 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 
#include <arm/armv8-r.dtsi>

#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>

#include <zephyr/dt-bindings/adc/adc.h>

#include <zephyr/dt-bindings/i2c/i2c.h>



/ {

	compatible = "renesas,r9a07g075";
@@ -1058,5 +1059,50 @@ 
				status = "disabled";

			};

		};



		i2c0: i2c@80043000 {

			compatible = "renesas,rz-iic";

			channel = <0>;

			clock-frequency = <I2C_BITRATE_STANDARD>;

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x80043000 0x400>;

			interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 309 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 310 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 311 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;

			interrupt-names = "eri", "rxi", "txi", "tei";

			status = "disabled";

		};



		i2c1: i2c@80043400 {

			compatible = "renesas,rz-iic";

			channel = <1>;

			clock-frequency = <I2C_BITRATE_STANDARD>;

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x80043400 0x400>;

			interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 313 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 314 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 315 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;

			interrupt-names = "eri", "rxi", "txi", "tei";

			status = "disabled";

		};



		i2c2: i2c@81008000 {

			compatible = "renesas,rz-iic";

			channel = <2>;

			clock-frequency = <I2C_BITRATE_STANDARD>;

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x81008000 0x400>;

			interrupts = <GIC_SPI 439 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 440 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 441 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 442 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;

			interrupt-names = "eri", "rxi", "txi", "tei";

			status = "disabled";

		};

	};

};

dts/arm/renesas/rz/rzv/r9a07g054.dtsi

+53 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
#include <mem.h>

#include <freq.h>

#include <zephyr/dt-bindings/adc/adc.h>

#include <zephyr/dt-bindings/i2c/i2c.h>



/ {

	compatible = "renesas,r9a07g054";
@@ -775,6 +776,58 @@ 
				status = "disabled";

			};

		};



		i2c0: i2c@40058000 {

			compatible = "renesas,rz-riic";

			channel = <0>;

			clock-frequency = <I2C_BITRATE_STANDARD>;

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x40058000 DT_SIZE_K(1)>;

			interrupts = <348 1>, <349 1>, <350 1>, <351 1>,

				     <352 1>, <353 1>, <354 1>, <355 1>;

			interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";

			status = "disabled";

		};



		i2c1: i2c@40058400 {

			compatible = "renesas,rz-riic";

			channel = <1>;

			clock-frequency = <I2C_BITRATE_STANDARD>;

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x40058400 DT_SIZE_K(1)>;

			interrupts = <356 1>, <357 1>, <358 1>, <359 1>,

				     <360 1>, <361 1>, <362 1>, <363 1>;

			interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";

			status = "disabled";

		};



		i2c2: i2c@40058800 {

			compatible = "renesas,rz-riic";

			channel = <2>;

			clock-frequency = <I2C_BITRATE_STANDARD>;

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x40058800 DT_SIZE_K(1)>;

			interrupts = <364 1>, <365 1>, <366 1>, <367 1>,

				     <368 1>, <369 1>, <370 1>, <371 1>;

			interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";

			status = "disabled";

		};



		i2c3: i2c@40058c00 {

			compatible = "renesas,rz-riic";

			channel = <3>;

			clock-frequency = <I2C_BITRATE_STANDARD>;

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x40058c00 DT_SIZE_K(1)>;

			interrupts = <372 1>, <373 1>, <374 1>, <375 1>,

				     <376 1>, <377 1>, <378 1>, <379 1>;

			interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";

			status = "disabled";

		};

	};

};

dts/arm64/renesas/rz/rza/r9a07g063.dtsi

+77 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
#include <zephyr/dt-bindings/gpio/gpio.h>

#include <zephyr/dt-bindings/pwm/renesas_rz_pwm.h>

#include <zephyr/dt-bindings/adc/adc.h>

#include <zephyr/dt-bindings/i2c/i2c.h>



/ {

	compatible = "renesas,r9a07g063";
@@ -570,5 +571,81 @@ 
				status = "disabled";

			};

		};



		i2c0: i2c@10058000 {

			compatible = "renesas,rz-riic";

			channel = <0>;

			clock-frequency = <I2C_BITRATE_STANDARD>;

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x10058000 DT_SIZE_K(1)>;

			interrupts = <GIC_SPI 348 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 349 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 350 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 351 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 352 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 353 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 354 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 355 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;

			interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";

			status = "disabled";

		};



		i2c1: i2c@10058400 {

			compatible = "renesas,rz-riic";

			channel = <1>;

			clock-frequency = <I2C_BITRATE_STANDARD>;

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x10058400 DT_SIZE_K(1)>;

			interrupts = <GIC_SPI 356 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 357 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 358 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 359 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 360 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 361 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 362 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 363 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;

			interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";

			status = "disabled";

		};



		i2c2: i2c@10058800 {

			compatible = "renesas,rz-riic";

			channel = <2>;

			clock-frequency = <I2C_BITRATE_STANDARD>;

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x10058800 DT_SIZE_K(1)>;

			interrupts = <GIC_SPI 364 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 365 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 366 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 367 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 368 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 369 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 370 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 371 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;

			interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";

			status = "disabled";

		};



		i2c3: i2c@10058c00 {

			compatible = "renesas,rz-riic";

			channel = <3>;

			clock-frequency = <I2C_BITRATE_STANDARD>;

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x10058c00 DT_SIZE_K(1)>;

			interrupts = <GIC_SPI 372 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 373 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 374 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 375 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 376 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 377 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 378 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,

					<GIC_SPI 379 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;

			interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";

			status = "disabled";

		};

	};

};

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