Commit 1a7576ce authored by Mahesh Rao's avatar Mahesh Rao Committed by Anas Nashif
Browse files

drivers: sip_svc: Add driver for SiP Supervisory call



Add driver for communicating with EL3/EL2 layer using smc/hvc call
for Silicon vendor Provided services for INTEL AGILEX SOC FPGA.

Signed-off-by: default avatarMahesh Rao <mahesh.rao@intel.com>
parent 4c66ac81
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@@ -76,3 +76,4 @@ add_subdirectory_ifdef(CONFIG_W1 w1)
add_subdirectory_ifdef(CONFIG_WATCHDOG watchdog)
add_subdirectory_ifdef(CONFIG_WIFI wifi)
add_subdirectory_ifdef(CONFIG_RTC rtc)
add_subdirectory_ifdef(CONFIG_ARM_SIP_SVC_DRIVER sip_svc)
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@@ -79,5 +79,6 @@ source "drivers/w1/Kconfig"
source "drivers/watchdog/Kconfig"
source "drivers/wifi/Kconfig"
source "drivers/xen/Kconfig"
source "drivers/sip_svc/Kconfig"

endmenu
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# Copyright (c) 2023 Intel Corporation
# SPDX-License-Identifier: Apache-2.0

zephyr_library()
zephyr_library_sources_ifdef(CONFIG_ARM_SIP_SVC_HAS_INTEL_SDM_MAILBOX_FIFO sip_smc_intel_socfpga.c)
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# Silicon vendor Provided Supervisory call driver for sip_svc subsystem

# Copyright (c) 2023 Intel Corporation
# SPDX-License-Identifier: Apache-2.0

menuconfig ARM_SIP_SVC_DRIVER
	bool "ARM SIP SVC driver"
	depends on ARM64
	help
	  ARM supervisory call driver for communicating with EL2 or EL3 firmware

if ARM_SIP_SVC_DRIVER

module = ARM_SIP_SVC_DRIVER
module-str = arm_sip_svc_driver
source "subsys/logging/Kconfig.template.log_config"

config ARM_SIP_SVC_DRIVER_INIT_PRIORITY
	int "Initialization priority"
	default 50

config ARM_SIP_SVC_HAS_DRIVER
	bool
	help
	   This is an option to be enabled by individual sip svc driver
	   to signal that there is a sip svc driver. This is used by other
	   modules which depends on sip svc driver.

source "drivers/sip_svc/Kconfig.sip_smc_agilex"

endif # ARM_SIP_SVC_DRIVER
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# Copyright (c) 2023 Intel Corporation
# SPDX-License-Identifier: Apache-2.0

config ARM_SIP_SVC_HAS_INTEL_SDM_MAILBOX_FIFO
	bool
	default y
	depends on DT_HAS_INTEL_AGILEX_SOCFPGA_SIP_SMC_ENABLED
	imply ARM_SIP_SVC_HAS_DRIVER
	help
	  Support for SDM mailbox fifo in Intel SoC FPGA Agilex via SMC calls.

config ARM_SIP_SVC_EL3_MAILBOX_RESPONSE_SIZE
	int "Size of response buffer used for ASYNC transactions."
	default 4096
	depends on ARM_SIP_SVC_HAS_INTEL_SDM_MAILBOX_FIFO
	help
	  Size of response buffer used for ASYNC transactions.For Intel Agilex platform
	  the maximum size of response buffer size is 4096 and minimum is 4 bytes.
	  Also it should be multiple of 4 bytes.

config ARM_SIP_SVC_EL3_MAX_ALLOWED_TRANSACTIONS
	int "Maximum allowable ongoing transactions."
	default 16
	depends on ARM_SIP_SVC_HAS_INTEL_SDM_MAILBOX_FIFO
	help
	  Allowed number of active transactions in sip_svc subsystem for this driver.
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