Commit 16c4b65d authored by Tomasz Bursztyka's avatar Tomasz Bursztyka Committed by Anas Nashif
Browse files

dts/x86: Add cache line size 



There is a property for it so let's use it.

Signed-off-by: default avatarTomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
parent f9a3ac31

dts/x86/apollo_lake.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ 
		cpu@0 {

			device_type = "cpu";

			compatible = "apollo_lake";

			d-cache-line-size = <64>;

			reg = <0>;

		};

dts/x86/atom.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ 
		cpu@0 {

			device_type = "cpu";

			compatible = "atom";

			d-cache-line-size = <64>;

			reg = <0>;

		};

	};

dts/x86/elkhart_lake.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ 
		cpu@0 {

			device_type = "cpu";

			compatible = "elkhart_lake";

			d-cache-line-size = <64>;

			reg = <0>;

		};

dts/x86/ia32.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ 
		cpu@0 {

			device_type = "cpu";

			compatible = "qemu32";

			d-cache-line-size = <64>;

			reg = <0>;

		};

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