Commit 161d8c0c authored by Sahaj Sarup's avatar Sahaj Sarup Committed by Kumar Gala
Browse files

arm: soc: add support for stm32f427 



Add STM32F427. This is mainly aimed towards the stm32f427vi.

Changes:

- Add stm32f427 support based on previous work
done for the stm32f429.
- Rework currunt stm32f429 implimentation to now
be based on stm32f427.
- Introduce dedicated dtsi for the VI variant of both
stm32f427 and stm32f429. This is done to prevent stm32f4.dtsi
from being included twice.

Signed-off-by: default avatarSahaj Sarup <sahaj.sarup@linaro.org>
parent 601b9727

dts/arm/st/f4/stm32f427.dtsi

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/*

 * Copyright (c) 2020 Linaro Limited

 *

 * SPDX-License-Identifier: Apache-2.0

 */



#include <st/f4/stm32f407.dtsi>



/ {

	soc {

		pinctrl: pin-controller@40020000 {

			reg = <0x40020000 0x2C00>;



			gpioj: gpio@40022400 {

				compatible = "st,stm32-gpio";

				gpio-controller;

				#gpio-cells = <2>;

				reg = <0x40022400 0x400>;

				clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000200>;

				label = "GPIOJ";

			};



			gpiok: gpio@40022800 {

				compatible = "st,stm32-gpio";

				gpio-controller;

				#gpio-cells = <2>;

				reg = <0x40022800 0x400>;

				clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000400>;

				label = "GPIOK";

			};

		};



		uart7: serial@40007800 {

			compatible = "st,stm32-uart";

			reg = <0x40007800 0x400>;

			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x40000000>;

			interrupts = <82 0>;

			status = "disabled";

			label = "UART_7";

		};



		uart8: serial@40007c00 {

			compatible = "st,stm32-uart";

			reg = <0x40007c00 0x400>;

			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>;

			interrupts = <83 0>;

			status = "disabled";

			label = "UART_8";

		};



		spi4: spi@40013400 {

			compatible = "st,stm32-spi";

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x40013400 0x400>;

			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00002000>;

			interrupts = <84 5>;

			status = "disabled";

			label = "SPI_4";

		};



		/* spi5 is present on all STM32F429XX SoCs except

		 * STM32F429vX SoCs. Delete node in stm32f429vX.dtsi.

		 */

		 spi5: spi@40015000 {

			compatible = "st,stm32-spi";

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x40015000 0x400>;

			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00100000>;

			interrupts = <85 5>;

			status = "disabled";

			label = "SPI_5";

		};



		/* spi6 is present on all STM32F429XX SoCs except

		 * STM32F429vX SoCs. Delete node in stm32f429vX.dtsi.

		 */

		spi6: spi@40015400 {

			compatible = "st,stm32-spi";

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x40015400 0x400>;

			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00200000>;

			interrupts = <86 5>;

			status = "disabled";

			label = "SPI_6";

		};

	};

};

dts/arm/st/f4/stm32f427Xi.dtsi

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/*

 * Copyright (c) 2020 Linaro Limited

 *

 * SPDX-License-Identifier: Apache-2.0

 */



#include <mem.h>

#include <st/f4/stm32f427.dtsi>



/ {

	ccm0: memory@10000000 {

		compatible = "st,stm32-ccm";

		reg = <0x10000000 DT_SIZE_K(64)>;

	};



	sram0: memory@20000000 {

		reg = <0x20000000 DT_SIZE_K(192)>;

	};



	soc {

		flash-controller@40023c00 {

			flash0: flash@8000000 {

				reg = <0x08000000 DT_SIZE_K(2048)>;

			};

		};

	};

};

dts/arm/st/f4/stm32f427vX.dtsi

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/*

 * Copyright (c) 2020 Linaro Limited

 *

 * SPDX-License-Identifier: Apache-2.0

 */



#include <st/f4/stm32f427.dtsi>



/delete-node/ &spi5;



/delete-node/ &spi6;

dts/arm/st/f4/stm32f427vi.dtsi

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Original line number Diff line number Diff line 
/*

 * Copyright (c) 2020 Linaro Limited

 *

 * SPDX-License-Identifier: Apache-2.0

 */



#include <mem.h>

#include <st/f4/stm32f427vX.dtsi>



/ {

	ccm0: memory@10000000 {

		compatible = "st,stm32-ccm";

		reg = <0x10000000 DT_SIZE_K(64)>;

	};



	sram0: memory@20000000 {

		reg = <0x20000000 DT_SIZE_K(192)>;

	};



	soc {

		flash-controller@40023c00 {

			flash0: flash@8000000 {

				reg = <0x08000000 DT_SIZE_K(2048)>;

			};

		};

	};

};

dts/arm/st/f4/stm32f429.dtsi

+2 −85
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2017 Linaro Limited

 * Copyright (c) 2017, 2020 Linaro Limited

 *

 * SPDX-License-Identifier: Apache-2.0

 */



#include <st/f4/stm32f407.dtsi>



/ {

	soc {

		pinctrl: pin-controller@40020000 {

			reg = <0x40020000 0x2C00>;



			gpioj: gpio@40022400 {

				compatible = "st,stm32-gpio";

				gpio-controller;

				#gpio-cells = <2>;

				reg = <0x40022400 0x400>;

				clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000200>;

				label = "GPIOJ";

			};



			gpiok: gpio@40022800 {

				compatible = "st,stm32-gpio";

				gpio-controller;

				#gpio-cells = <2>;

				reg = <0x40022800 0x400>;

				clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000400>;

				label = "GPIOK";

			};

		};



		uart7: serial@40007800 {

			compatible = "st,stm32-uart";

			reg = <0x40007800 0x400>;

			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x40000000>;

			interrupts = <82 0>;

			status = "disabled";

			label = "UART_7";

		};



		uart8: serial@40007c00 {

			compatible = "st,stm32-uart";

			reg = <0x40007c00 0x400>;

			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>;

			interrupts = <83 0>;

			status = "disabled";

			label = "UART_8";

		};



		spi4: spi@40013400 {

			compatible = "st,stm32-spi";

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x40013400 0x400>;

			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00002000>;

			interrupts = <84 5>;

			status = "disabled";

			label = "SPI_4";

		};



		/* spi5 is present on all STM32F429XX SoCs except

		 * STM32F429vX SoCs. Delete node in stm32f429vX.dtsi.

		 */

		 spi5: spi@40015000 {

			compatible = "st,stm32-spi";

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x40015000 0x400>;

			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00100000>;

			interrupts = <85 5>;

			status = "disabled";

			label = "SPI_5";

		};



		/* spi6 is present on all STM32F429XX SoCs except

		 * STM32F429vX SoCs. Delete node in stm32f429vX.dtsi.

		 */

		spi6: spi@40015400 {

			compatible = "st,stm32-spi";

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x40015400 0x400>;

			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00200000>;

			interrupts = <86 5>;

			status = "disabled";

			label = "SPI_6";

		};

	};

};
 
#include <st/f4/stm32f427.dtsi>

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