Commit 0f18c4c4 authored by Mulin Chao's avatar Mulin Chao Committed by Carles Cufi
Browse files

pinctrl: npcx: config pwm open-drain without enabling STORE_REG

Config pwm open-drain mode without enabling STORE_REG. This CL
collects all active PWM's base address and related index in an
array. Then, pinctrl driver configs its open-drain mode by
finding the corresponding 'channel' index.

Signed-off-by: default avatarMulin Chao <mlchao@nuvoton.com>
parent 4e443dac
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+0 −1
Changes for drivers/pinctrl/Kconfig.npcx: 0 added lines, 1 removed line.
Original line number Diff line number Diff line
@@ -8,7 +8,6 @@ DT_COMPAT_ST_PINCTRL_NPCX := nuvoton,npcx-pinctrl
config PINCTRL_NPCX
	bool "Nuvoton NPCX embedded controller (EC) pin controller driver"
	depends on SOC_FAMILY_NPCX
	select PINCTRL_STORE_REG
	default $(dt_compat_enabled,$(DT_COMPAT_ST_PINCTRL_NPCX))
	help
	  This option enables the pin controller driver for NPCX family of
+33 −2
Changes for drivers/pinctrl/pinctrl_npcx.c: 33 added lines, 2 removed lines.
Original line number Diff line number Diff line
@@ -17,6 +17,22 @@ static const struct npcx_pinctrl_config npcx_pinctrl_cfg = {
	.base_scfg = DT_REG_ADDR_BY_NAME(DT_NODELABEL(scfg), scfg),
};

/* PWM pinctrl config */
struct npcx_pwm_pinctrl_config {
	uintptr_t base;
	int channel;
};

#define NPCX_PWM_PINCTRL_CFG_INIT(node_id)			\
	{							\
		.base = DT_REG_ADDR(node_id),			\
		.channel = DT_PROP(node_id, pwm_channel),	\
	},

static const struct npcx_pwm_pinctrl_config pwm_pinctrl_cfg[] = {
	DT_FOREACH_STATUS_OKAY(nuvoton_npcx_pwm, NPCX_PWM_PINCTRL_CFG_INIT)
};

/* Pin-control local functions for peripheral devices */
static bool npcx_periph_pinmux_has_lock(int group)
{
@@ -70,8 +86,23 @@ static void npcx_periph_pupd_configure(const struct npcx_periph *pupd,
	}
}

static void npcx_periph_pwm_drive_mode_configure(uintptr_t reg, bool is_od)
static void npcx_periph_pwm_drive_mode_configure(const struct npcx_periph *periph,
	bool is_od)
{
	uintptr_t reg = 0;

	/* Find selected pwm module which enables open-drain prop. */
	for (int i = 0; i < ARRAY_SIZE(pwm_pinctrl_cfg); i++) {
		if (periph->group == pwm_pinctrl_cfg[i].channel) {
			reg = pwm_pinctrl_cfg[i].base;
			break;
		}
	}

	if (reg == 0) {
		return;
	}

	struct pwm_reg *const inst = (struct pwm_reg *)(reg);

	if (is_od) {
@@ -94,7 +125,7 @@ static void npcx_periph_configure(const pinctrl_soc_pin_t *pin, uintptr_t reg)
			pin->flags.io_bias_type);
	} else if (pin->cfg.periph.type == NPCX_PINCTRL_TYPE_PERIPH_DRIVE) {
		/* Configure peripheral device's drive mode. (Only PWM pads support it) */
		npcx_periph_pwm_drive_mode_configure(reg,
		npcx_periph_pwm_drive_mode_configure(&pin->cfg.periph,
			pin->flags.io_drive_type == NPCX_DRIVE_TYPE_OPEN_DRAIN);
	}
}
+8 −0
Changes for dts/arm/nuvoton/npcx.dtsi: 8 added lines, 0 removed lines.
Original line number Diff line number Diff line
@@ -293,6 +293,7 @@
		pwm0: pwm@40080000 {
			compatible = "nuvoton,npcx-pwm";
			reg = <0x40080000 0x2000>;
			pwm-channel = <0>;
			clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 0>;
			#pwm-cells = <3>;
			status = "disabled";
@@ -302,6 +303,7 @@
		pwm1: pwm@40082000 {
			compatible = "nuvoton,npcx-pwm";
			reg = <0x40082000 0x2000>;
			pwm-channel = <1>;
			clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 1>;
			#pwm-cells = <3>;
			status = "disabled";
@@ -311,6 +313,7 @@
		pwm2: pwm@40084000 {
			compatible = "nuvoton,npcx-pwm";
			reg = <0x40084000 0x2000>;
			pwm-channel = <2>;
			clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 2>;
			#pwm-cells = <3>;
			status = "disabled";
@@ -320,6 +323,7 @@
		pwm3: pwm@40086000 {
			compatible = "nuvoton,npcx-pwm";
			reg = <0x40086000 0x2000>;
			pwm-channel = <3>;
			clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 3>;
			#pwm-cells = <3>;
			status = "disabled";
@@ -329,6 +333,7 @@
		pwm4: pwm@40088000 {
			compatible = "nuvoton,npcx-pwm";
			reg = <0x40088000 0x2000>;
			pwm-channel = <4>;
			clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 4>;
			#pwm-cells = <3>;
			status = "disabled";
@@ -338,6 +343,7 @@
		pwm5: pwm@4008a000 {
			compatible = "nuvoton,npcx-pwm";
			reg = <0x4008a000 0x2000>;
			pwm-channel = <5>;
			clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 5>;
			#pwm-cells = <3>;
			status = "disabled";
@@ -347,6 +353,7 @@
		pwm6: pwm@4008c000 {
			compatible = "nuvoton,npcx-pwm";
			reg = <0x4008c000 0x2000>;
			pwm-channel = <6>;
			clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 6>;
			#pwm-cells = <3>;
			status = "disabled";
@@ -356,6 +363,7 @@
		pwm7: pwm@4008e000 {
			compatible = "nuvoton,npcx-pwm";
			reg = <0x4008e000 0x2000>;
			pwm-channel = <7>;
			clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 7>;
			#pwm-cells = <3>;
			status = "disabled";
+0 −8
Changes for dts/arm/nuvoton/npcx/npcx7/npcx7-pinctrl.dtsi: 0 added lines, 8 removed lines.
Original line number Diff line number Diff line
@@ -111,42 +111,34 @@
	/* PWM peripheral interfaces */
	/omit-if-no-ref/ pwm0_gpc3: periph-pwm0 {
		pinmux = <&alt4_pwm0_sl>;
		drive-supported;
	};

	/omit-if-no-ref/ pwm1_gpc2: periph-pwm1 {
		pinmux = <&alt4_pwm1_sl>;
		drive-supported;
	};

	/omit-if-no-ref/ pwm2_gpc4: periph-pwm2 {
		pinmux = <&alt4_pwm2_sl>;
		drive-supported;
	};

	/omit-if-no-ref/ pwm3_gp80: periph-pwm3 {
		pinmux = <&alt4_pwm3_sl>;
		drive-supported;
	};

	/omit-if-no-ref/ pwm4_gpb6: periph-pwm4 {
		pinmux = <&alt4_pwm4_sl>;
		drive-supported;
	};

	/omit-if-no-ref/ pwm5_gpb7: periph-pwm5 {
		pinmux = <&alt4_pwm5_sl>;
		drive-supported;
	};

	/omit-if-no-ref/ pwm6_gpc0: periph-pwm6 {
		pinmux = <&alt4_pwm6_sl>;
		drive-supported;
	};

	/omit-if-no-ref/ pwm7_gp60: periph-pwm7 {
		pinmux = <&alt4_pwm7_sl>;
		drive-supported;
	};

	/* Keyboard peripheral interfaces. */
+0 −8
Changes for dts/arm/nuvoton/npcx/npcx9/npcx9-pinctrl.dtsi: 0 added lines, 8 removed lines.
Original line number Diff line number Diff line
@@ -111,42 +111,34 @@
	/* PWM peripheral interfaces */
	/omit-if-no-ref/ pwm0_gpc3: periph-pwm0 {
		pinmux = <&alt4_pwm0_sl>;
		drive-supported;
	};

	/omit-if-no-ref/ pwm1_gpc2: periph-pwm1 {
		pinmux = <&alt4_pwm1_sl>;
		drive-supported;
	};

	/omit-if-no-ref/ pwm2_gpc4: periph-pwm2 {
		pinmux = <&alt4_pwm2_sl>;
		drive-supported;
	};

	/omit-if-no-ref/ pwm3_gp80: periph-pwm3 {
		pinmux = <&alt4_pwm3_sl>;
		drive-supported;
	};

	/omit-if-no-ref/ pwm4_gpb6: periph-pwm4 {
		pinmux = <&alt4_pwm4_sl>;
		drive-supported;
	};

	/omit-if-no-ref/ pwm5_gpb7: periph-pwm5 {
		pinmux = <&alt4_pwm5_sl>;
		drive-supported;
	};

	/omit-if-no-ref/ pwm6_gpc0: periph-pwm6 {
		pinmux = <&alt4_pwm6_sl>;
		drive-supported;
	};

	/omit-if-no-ref/ pwm7_gp60: periph-pwm7 {
		pinmux = <&alt4_pwm7_sl>;
		drive-supported;
	};

	/* Keyboard peripheral interfaces. */
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