Commit 0e8a324e authored by Sylvio Alves's avatar Sylvio Alves Committed by Benjamin Cabé
Browse files

boards: xiao_esp32c6: add multi-core support 

ESP32-C6 now supports both HP and LP core app.
This fixes and updates XIAO board to support that as well.

Signed-off-by: default avatarSylvio Alves <sylvio.alves@espressif.com>
parent b1e169f2

boards/deprecated.cmake

+3 −0
Changes for boards/deprecated.cmake: 3 added lines, 0 removed lines.
Original line number Diff line number Diff line
@@ -49,3 +49,6 @@ set(mimxrt1060_evkb_DEPRECATED 
set(neorv32_DEPRECATED

    neorv32/neorv32/up5kdemo

)

set(xiao_esp32c6_DEPRECATED

    xiao_esp32c6/esp32c6/hpcore

)

boards/seeed/xiao_esp32c6/Kconfig

+2 −1
Changes for boards/seeed/xiao_esp32c6/Kconfig: 2 added lines, 1 removed line.
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@@ -3,4 +3,5 @@ 


config HEAP_MEM_POOL_ADD_SIZE_BOARD

	int

	default 4096
 
	default 4096 if BOARD_XIAO_ESP32C6_ESP32C6_HPCORE

	default 256 if BOARD_XIAO_ESP32C6_ESP32C6_LPCORE

boards/seeed/xiao_esp32c6/Kconfig.xiao_esp32c6

+2 −0
Changes for boards/seeed/xiao_esp32c6/Kconfig.xiao_esp32c6: 2 added lines, 0 removed lines.
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@@ -5,3 +5,5 @@ 


config BOARD_XIAO_ESP32C6

	select SOC_ESP32_C6_WROOM_1U_N4

	select SOC_ESP32C6_HPCORE if BOARD_XIAO_ESP32C6_ESP32C6_HPCORE

	select SOC_ESP32C6_LPCORE if BOARD_XIAO_ESP32C6_ESP32C6_LPCORE

boards/seeed/xiao_esp32c6/doc/index.rst

+7 −7
Changes for boards/seeed/xiao_esp32c6/doc/index.rst: 7 added lines, 7 removed lines.
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@@ -94,12 +94,12 @@ To build the sample application using sysbuild use the command: 
.. zephyr-app-commands::

   :tool: west

   :zephyr-app: samples/hello_world

   :board: xiao_esp32c6

   :board: xiao_esp32c6/esp32c6/hpcore

   :goals: build

   :west-args: --sysbuild

   :compact:



By default, the ESP32 sysbuild creates bootloader (MCUboot) and application

By default, the ESP32-C6 sysbuild creates bootloader (MCUboot) and application

images. But it can be configured to create other kind of images.



Build directory structure created by sysbuild is different from traditional
@@ -143,7 +143,7 @@ Build and flash applications as usual (see :ref:`build_an_application` and 


.. zephyr-app-commands::

   :zephyr-app: samples/hello_world

   :board: xiao_esp32c6

   :board: xiao_esp32c6/esp32c6/hpcore

   :goals: build



The usual ``flash`` target will work with the ``xiao_esp32c6`` board
@@ -152,7 +152,7 @@ application. 


.. zephyr-app-commands::

   :zephyr-app: samples/hello_world

   :board: xiao_esp32c6

   :board: xiao_esp32c6/esp32c6/hpcore

   :goals: flash



Since the Zephyr console is by default on the ``usb_serial`` device, we use
@@ -168,7 +168,7 @@ message in the monitor: 
.. code-block:: console



   ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****

   Hello World! xiao_esp32c6/esp32c6

   Hello World! xiao_esp32c6/esp32c6/hpcore



Debugging

*********
@@ -185,7 +185,7 @@ Here is an example for building the :zephyr:code-sample:`hello_world` applicatio 


.. zephyr-app-commands::

   :zephyr-app: samples/hello_world

   :board: xiao_esp32c6

   :board: xiao_esp32c6/esp32c6/hpcore

   :goals: build flash

   :gen-args: -DOPENOCD=<path/to/bin/openocd> -DOPENOCD_DEFAULT_PATH=<path/to/openocd/share/openocd/scripts>
@@ -193,7 +193,7 @@ You can debug an application in the usual way. Here is an example for the :zephy 


.. zephyr-app-commands::

   :zephyr-app: samples/hello_world

   :board: xiao_esp32c6

   :board: xiao_esp32c6/esp32c6/hpcore

   :goals: debug



References

boards/seeed/xiao_esp32c6/xiao_esp32c6.dts→boards/seeed/xiao_esp32c6/xiao_esp32c6_hpcore.dts

+1 −1
Changes for boards/seeed/xiao_esp32c6/xiao_esp32c6_hpcore.dts: 1 added line, 1 removed line.
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@@ -13,7 +13,7 @@ 
#include "seeed_xiao_connector.dtsi"



/ {

	model = "Seeed XIAO ESP32C6";

	model = "Seeed XIAO ESP32C6 HP Core";

	compatible = "seeed,xiao-esp32c6";



	chosen {

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