tests/boards/intel_adsp: Add cache related tests

Tests that exercise z_xtensa_cache_[flush|inv|flush_inv]_all()
functions.

These tests are at board level because what is mapped into memory is
SoC/board dependent - no one wants side effects due writing to some
inappropriate address.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>