boards nrf_bsim: Add a new nrf54l15bsim target (0b173b10) · Commits · Wenxi XU / zephyr

boards/native/doc/bsim_boards_design.rst

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		@@ -7,6 +7,7 @@ Bsim boards

		* :ref:`Simulated nRF52833 (nrf52_bsim)<nrf52_bsim>`
		* :ref:`Simulated nRF5340 (nrf5340bsim)<nrf5340bsim>`
		* :ref:`Simulated nRF54L15 (nrf54l15bsim)<nrf54l15bsim>`

		.. contents:: Table of contents
		:depth: 2
		@@ -20,8 +21,8 @@ These boards are postfixed with `_bsim` as they use BabbleSim_
		These boards use the `native simulator`_ and the :ref:`POSIX architecture<Posix arch>` to build
		and execute the embedded code natively on Linux.

		Particular details on the :ref:`nRF52<nrf52_bsim>` and :ref:`nRF5340<nrf5340bsim>`
		simulation boards, including how to use them,
		Particular details on the :ref:`nRF52<nrf52_bsim>`, :ref:`nRF5340<nrf5340bsim>` and
		:ref:`nRF54l15<nrf54l15bsim>` simulation boards, including how to use them,
		can be found in their respective documentation.

		.. _BabbleSim:

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		@@ -34,6 +34,17 @@ config BOARD_NRF5340BSIM_NRF5340_CPUAPP
		Will produce a console Linux process which can be executed natively.
		It needs the BabbleSim simulator both in compile time and to execute

		config BOARD_NRF54L15BSIM_NRF54L15_CPUAPP
		bool
		select SOC_SERIES_BSIM_NRF54LX
		select SOC_COMPATIBLE_NRF54L15
		select SOC_COMPATIBLE_NRF54L15_CPUAPP
		select CLOCK_CONTROL
		help
		Simulated NRF54L15 Application core
		Will produce a console Linux process which can be executed natively.
		It needs the BabbleSim simulator both in compile time and to execute


		if SOC_SERIES_BSIM_NRFXX

		@@ -76,6 +87,13 @@ config SOC_SERIES_BSIM_NRF53X
		help
		Any NRF53 simulated SOC with BabbleSim, based on the POSIX arch

		config SOC_SERIES_BSIM_NRF54LX
		bool
		select SOC_SERIES_BSIM_NRFXX
		select SOC_COMPATIBLE_NRF54LX
		help
		Any NRF54L simulated SOC with BabbleSim, based on the POSIX arch

		if BOARD_NRF5340BSIM_NRF5340_CPUAPP

		# Replica of the option provided by the BOARD_NRF5340DK_NRF5340_CPUAPP board so samples can be

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		@@ -30,10 +30,12 @@ config NATIVE_SIMULATOR_PRIMARY_MCU_INDEX
		default 0

		config SYS_CLOCK_HW_CYCLES_PER_SEC
		default 1000000 if NRF_GRTC_TIMER
		default 32768

		config SYS_CLOCK_TICKS_PER_SEC
		default 128 if !TICKLESS_KERNEL
		default 10000 if NRF_GRTC_TIMER
		default 32768

		config BT_CTLR

0 → 100644

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		# Copyright (c) 2024 Nordic Semiconductor ASA
		# SPDX-License-Identifier: Apache-2.0

		config BOARD_NRF54L15BSIM
		select SOC_POSIX

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		@@ -6,6 +6,10 @@ boards:
		- name: nrf5340bsim
		vendor: zephyr
		socs:
		# Note this is referring to the real SOC yaml, but we only use its name and cpu-cluster definition
		# In practice this board uses the same native SOC (SOC_POSIX) as the nrf52_bsim
		- name: nrf5340
		- name: nrf54l15bsim
		vendor: zephyr
		socs:
		- name: nrf54l15
		# Note the 53 and 54 are referring to the real SOC yamls, but we only use their name and cpu-cluster
		# definitions. In practice these board uses the same native SOC (SOC_POSIX) as the nrf52_bsim