Commit 07877446 authored by Yong Cong Sin's avatar Yong Cong Sin Committed by Anas Nashif
Browse files

tests: arch: common: stack_unwind: add qemu_riscv32e 



qemu_riscv32e uses a different ISA and is kinda special, add it
to the testcase for better coverage.

Signed-off-by: default avatarYong Cong Sin <ycsin@meta.com>
Signed-off-by: default avatarYong Cong Sin <yongcong.sin@gmail.com>
parent af314643

tests/arch/common/stack_unwind/testcase.yaml

+3 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ tests: 
  arch.common.stack_unwind.riscv_fp:

    arch_allow: riscv

    integration_platforms:

      - qemu_riscv32e

      - qemu_riscv32

      - qemu_riscv64

    extra_configs:
@@ -20,6 +21,7 @@ tests: 
  arch.common.stack_unwind.riscv_sp:

    arch_allow: riscv

    integration_platforms:

      - qemu_riscv32e

      - qemu_riscv32

      - qemu_riscv64

    harness_config:
@@ -58,6 +60,7 @@ tests: 
      - riscv

      - arm64

    integration_platforms:

      - qemu_riscv32e

      - qemu_riscv32

      - qemu_riscv64

      - qemu_cortex_a53

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