Commit 072ea896 authored by Sylvio Alves's avatar Sylvio Alves Committed by Carles Cufi
Browse files

soc: espressif: esp32s2: update to hal_espressif v5.1 



Modify and reorganize SoC to meet updated hal.

Signed-off-by: default avatarLucas Tamborrino <lucas.tamborrino@espressif.com>
Signed-off-by: default avatarSylvio Alves <sylvio.alves@espressif.com>
parent e5872497

include/zephyr/dt-bindings/clock/esp32s2_clock.h

+1 −1
Original line number Diff line number Diff line
@@ -21,7 +21,7 @@ 
#define ESP32_CLK_CPU_240M             240000000



/* Supported XTAL Frequencies */

#define ESP32_CLK_XTAL_40M             0U

#define ESP32_CLK_XTAL_40M             40



/* Supported RTC fast clock frequencies */

#define ESP32_RTC_FAST_CLK_FREQ_8M     8500000U

soc/espressif/esp32s2/CMakeLists.txt

+17 −48
Original line number Diff line number Diff line
@@ -3,7 +3,7 @@ 
zephyr_sources(

  soc.c

  soc_cache.c

  loader.c

  ../common/loader.c

  )



zephyr_include_directories(.)
@@ -25,52 +25,21 @@ dt_reg_addr(boot_off PATH ${dts_partition_path}) 
math(EXPR esptoolpy_flashsize "${CONFIG_FLASH_SIZE} / 0x100000")



if(CONFIG_BOOTLOADER_ESP_IDF)

  include(ExternalProject)



  ## we use hello-world project, but I think any can be used.

  set(espidf_components_dir   ${ESP_IDF_PATH}/components)

  set(espidf_prefix    ${CMAKE_BINARY_DIR}/esp-idf)

  set(espidf_build_dir ${espidf_prefix}/build)



  ExternalProject_Add(

    EspIdfBootloader

    PREFIX ${espidf_prefix}

    SOURCE_DIR ${espidf_components_dir}/bootloader/subproject

    BINARY_DIR ${espidf_build_dir}/bootloader

    CONFIGURE_COMMAND

    ${CMAKE_COMMAND} -G${CMAKE_GENERATOR}

    -S ${espidf_components_dir}/bootloader/subproject

    -B ${espidf_build_dir}/bootloader -DSDKCONFIG=${espidf_build_dir}/sdkconfig

    -DIDF_PATH=${ESP_IDF_PATH} -DIDF_TARGET=${CONFIG_SOC_SERIES}

    -DPYTHON_DEPS_CHECKED=1

    -DCMAKE_C_COMPILER=${CMAKE_C_COMPILER}

    -DCMAKE_CXX_COMPILER=${CMAKE_CXX_COMPILER}

    -DCMAKE_ASM_COMPILER=${CMAKE_ASM_COMPILER}

    -DCMAKE_SYSTEM_NAME=${CMAKE_SYSTEM_NAME}

    -DPYTHON=${PYTHON_EXECUTABLE}

    BUILD_COMMAND

    ${CMAKE_COMMAND} --build .

    INSTALL_COMMAND ""      # This particular build system has no install command

    )



  ExternalProject_Add(

    EspPartitionTable

    SOURCE_DIR ${espidf_components_dir}/partition_table

    BINARY_DIR ${espidf_build_dir}

    CONFIGURE_COMMAND ""

    BUILD_COMMAND

    ${PYTHON_EXECUTABLE} ${ESP_IDF_PATH}/components/partition_table/gen_esp32part.py -q

    --offset 0x8000 --flash-size ${esptoolpy_flashsize}MB ${ESP_IDF_PATH}/components/partition_table/partitions_singleapp.csv ${espidf_build_dir}/partitions_singleapp.bin

    INSTALL_COMMAND ""

    )



  set_property(TARGET bintools PROPERTY disassembly_flag_inline_source)

  set(bootloader_dir "${ZEPHYR_HAL_ESPRESSIF_MODULE_DIR}/zephyr/blobs/lib/${CONFIG_SOC_SERIES}")



  add_dependencies(app EspIdfBootloader EspPartitionTable)

  if(EXISTS "${bootloader_dir}/bootloader-${CONFIG_SOC_SERIES}.bin")

    file(COPY "${bootloader_dir}/bootloader-${CONFIG_SOC_SERIES}.bin" DESTINATION ${CMAKE_BINARY_DIR})

    file(RENAME "${CMAKE_BINARY_DIR}/bootloader-${CONFIG_SOC_SERIES}.bin" "${CMAKE_BINARY_DIR}/bootloader.bin")

  endif()



  board_finalize_runner_args(esp32 "--esp-flash-bootloader=${espidf_build_dir}/bootloader/bootloader.bin")

  if(EXISTS "${bootloader_dir}/partition-table-${CONFIG_SOC_SERIES}.bin")

    file(COPY "${bootloader_dir}/partition-table-${CONFIG_SOC_SERIES}.bin" DESTINATION ${CMAKE_BINARY_DIR})

    file(RENAME "${CMAKE_BINARY_DIR}/partition-table-${CONFIG_SOC_SERIES}.bin" "${CMAKE_BINARY_DIR}/partition-table.bin")

  endif()

  board_finalize_runner_args(esp32 "--esp-flash-bootloader=${CMAKE_BINARY_DIR}/bootloader.bin")



  board_finalize_runner_args(esp32 "--esp-flash-partition_table=${espidf_build_dir}/partitions_singleapp.bin")

  board_finalize_runner_args(esp32 "--esp-flash-partition_table=${CMAKE_BINARY_DIR}/partition-table.bin")



  board_finalize_runner_args(esp32 "--esp-partition-table-address=0x8000")
@@ -80,7 +49,7 @@ if(CONFIG_MCUBOOT OR CONFIG_BOOTLOADER_ESP_IDF) 


  if(CONFIG_BUILD_OUTPUT_BIN)

    set_property(GLOBAL APPEND PROPERTY extra_post_build_commands

      COMMAND ${PYTHON_EXECUTABLE} ${ESP_IDF_PATH}/components/esptool_py/esptool/esptool.py

      COMMAND ${PYTHON_EXECUTABLE} ${ESP_IDF_PATH}/tools/esptool_py/esptool.py

      ARGS --chip esp32s2 elf2image --flash_mode dio --flash_freq 40m --flash_size ${esptoolpy_flashsize}MB

      -o ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.bin

      ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf)

soc/espressif/esp32s2/Kconfig

+8 −136
Original line number Diff line number Diff line
@@ -19,72 +19,6 @@ config IDF_TARGET_ESP32S2 
	bool "ESP32S2 as target SOC"

	default y



config ESP_SYSTEM_RTC_EXT_XTAL

	bool



config ESP_SYSTEM_RTC_EXT_OSC

	bool



choice ESP32S2_RTC_CLK_SRC

	prompt "RTC clock source"

	default ESP32S2_RTC_CLK_SRC_INT_RC

	help

	  Choose which clock is used as RTC clock source.



	  - "Internal 90kHz oscillator" option provides lowest deep sleep current

	    consumption, and does not require extra external components. However

	    frequency stability with respect to temperature is poor, so time may

	    drift in deep/light sleep modes.

	  - "External 32kHz crystal" provides better frequency stability, at the

	    expense of slightly higher (1uA) deep sleep current consumption.

	  - "External 32kHz oscillator" allows using 32kHz clock generated by an

	    external circuit. In this case, external clock signal must be connected

	    to 32K_XN pin. Amplitude should be <1.2V in case of sine wave signal,

	    and <1V in case of square wave signal. Common mode voltage should be

	    0.1 < Vcm < 0.5Vamp, where Vamp is the signal amplitude.

	    Additionally, 1nF capacitor must be connected between 32K_XP pin and

	    ground. 32K_XP pin can not be used as a GPIO in this case.

	  - "Internal 8MHz oscillator divided by 256" option results in higher

	    deep sleep current (by 5uA) but has better frequency stability than

	    the internal 90kHz oscillator. It does not require external components.



config ESP32S2_RTC_CLK_SRC_INT_RC

	bool "Internal 90kHz RC oscillator"



config ESP32S2_RTC_CLK_SRC_EXT_CRYS

	bool "External 32kHz crystal"

	select ESP_SYSTEM_RTC_EXT_XTAL



config ESP32S2_RTC_CLK_SRC_EXT_OSC

	bool "External 32kHz oscillator at 32K_XN pin"

	select ESP_SYSTEM_RTC_EXT_OSC



config ESP32S2_RTC_CLK_SRC_INT_8MD256

	bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"



endchoice



config ESP32S2_RTC_CLK_CAL_CYCLES

	int "Number of cycles for RTC_SLOW_CLK calibration"

	default 3000 if ESP32S2_RTC_CLK_SRC_EXT_CRYS || ESP32S2_RTC_CLK_SRC_EXT_OSC || ESP32S2_RTC_CLK_SRC_INT_8MD256

	default 576 if ESP32S2_RTC_CLK_SRC_INT_RC

	range 0 125000

	help

	  When the startup code initializes RTC_SLOW_CLK, it can perform

	  calibration by comparing the RTC_SLOW_CLK frequency with main XTAL

	  frequency. This option sets the number of RTC_SLOW_CLK cycles measured

	  by the calibration routine. Higher numbers increase calibration

	  precision, which may be important for applications which spend a lot of

	  time in deep sleep. Lower numbers reduce startup time.



	  When this option is set to 0, clock calibration will not be performed at

	  startup, and approximate clock frequencies will be assumed:



	  - 90000 Hz if internal RC oscillator is used as clock source. For this use value 1024.

	  - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.

	    In case more value will help improve the definition of the launch of the crystal.

	    If the crystal could not start, it will be switched to internal RC.



menu "Cache config"



choice
@@ -111,19 +45,18 @@ choice 


endchoice



choice

choice ESP32S2_DATA_CACHE_SIZE

	prompt "Data cache size"

	default ESP32S2_DATA_CACHE_0KB if !ESP_SPIRAM

	default ESP32S2_DATA_CACHE_8KB if ESP_SPIRAM



	default ESP32S2_DATA_CACHE_8KB

	help

		Data cache size to be set on application startup.

	config ESP32S2_DATA_CACHE_0KB

		bool "0KB data cache size"



		depends on !ESP_SPIRAM

		bool "0KB"

	config ESP32S2_DATA_CACHE_8KB

		bool "8KB data cache size"



		bool "8KB"

	config ESP32S2_DATA_CACHE_16KB

		bool "16KB data cache size"

		bool "16KB"



endchoice
@@ -152,67 +85,6 @@ config ESP32S2_DATA_CACHE_SIZE 


endmenu  # Cache config



menu "PSRAM clock and cs IO for ESP32-S2"

	depends on ESP_SPIRAM



config DEFAULT_PSRAM_CLK_IO

	int "PSRAM CLK IO number"

	range 0 33

	default 30

	help

	  The PSRAM CLOCK IO can be any unused GPIO, user can config

	  it based on hardware design.



config DEFAULT_PSRAM_CS_IO

	int "PSRAM CS IO number"

	range 0 33

	default 26

	help

	  The PSRAM CS IO can be any unused GPIO, user can config it

	  based on hardware design.



endmenu # PSRAM clock and cs IO for ESP32S2



choice ESP32S2_UNIVERSAL_MAC_ADDRESSES

	bool "Number of universally administered (by IEEE) MAC address"

	default ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO

	help

	  Configure the number of universally administered (by IEEE) MAC addresses.

	  During initialization, MAC addresses for each network interface are generated or

	  derived from a single base MAC address. If the number of universal MAC addresses is two,

	  all interfaces (WiFi station, WiFi softap) receive a universally administered MAC

	  address.

	  They are generated sequentially by adding 0, and 1 (respectively) to the final octet of

	  the base MAC address. If the number of universal MAC addresses is one, only WiFi station

	  receives a universally administered MAC address.

	  The WiFi softap receives local MAC addresses. It's derived from the universal WiFi

	  station MAC addresses.

	  When using the default (Espressif-assigned) base MAC address, either setting can be used.

	  When using a custom universal MAC address range, the correct setting will depend on the

	  allocation of MAC addresses in this range (either 1 or 2 per device).



config ESP32S2_UNIVERSAL_MAC_ADDRESSES_ONE

	bool "One"

	select ESP_MAC_ADDR_UNIVERSE_WIFI_STA



config ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO

	bool "Two"

	select ESP_MAC_ADDR_UNIVERSE_WIFI_STA

	select ESP_MAC_ADDR_UNIVERSE_WIFI_AP



endchoice # ESP32S2_UNIVERSAL_MAC_ADDRESSES



config ESP_MAC_ADDR_UNIVERSE_WIFI_AP

	bool



config ESP_MAC_ADDR_UNIVERSE_WIFI_STA

	bool



config ESP32S2_UNIVERSAL_MAC_ADDRESSES

	int

	default 1 if ESP32S2_UNIVERSAL_MAC_ADDRESSES_ONE

	default 2 if ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO



config ESP32_PHY_MAX_WIFI_TX_POWER

	int "Max WiFi TX power (dBm)"

	range 10 20

soc/espressif/esp32s2/Kconfig.defconfig

+1 −13
Original line number Diff line number Diff line
@@ -3,22 +3,10 @@ 


if SOC_SERIES_ESP32S2



config MINIMAL_LIBC_OPTIMIZE_STRING_FOR_SIZE

	default n



config SYS_CLOCK_HW_CYCLES_PER_SEC

	default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency)



config XTENSA_CCOUNT_HZ

	default SYS_CLOCK_HW_CYCLES_PER_SEC



config ESPTOOLPY_FLASHFREQ_80M

	default y



config FLASH_SIZE

	default $(dt_node_reg_size_int,/soc/flash-controller@3f402000/flash@0,0)



config FLASH_BASE_ADDRESS

	default $(dt_node_reg_addr_hex,/soc/flash-controller@3f402000/flash@0)



endif # SOC_SERIES_ESP32S3
 
endif # SOC_SERIES_ESP32S2

soc/espressif/esp32s2/Kconfig.defconfig.series

deleted100644 → 0
+0 −27
Original line number Diff line number Diff line 
# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.

# SPDX-License-Identifier: Apache-2.0



if SOC_SERIES_ESP32S2



config SYS_CLOCK_HW_CYCLES_PER_SEC

	default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency)



config XTENSA_CCOUNT_HZ

	default SYS_CLOCK_HW_CYCLES_PER_SEC



config MP_MAX_NUM_CPUS

	default 1



config ISR_STACK_SIZE

	default 2048



config ESPTOOLPY_FLASHFREQ_80M

	default y



config FLASH_SIZE

	default $(dt_node_reg_size_int,/soc/flash-controller@3f402000/flash@0,0)



config FLASH_BASE_ADDRESS

	default $(dt_node_reg_addr_hex,/soc/flash-controller@3f402000/flash@0)



endif # SOC_SERIES_ESP32S2

CRA Git | Maintained and supported by SUSTech CRA and CCSE