Commit 06ad037f authored by Daniel DeGrasse's avatar Daniel DeGrasse Committed by Jamie
Browse files

soc: nxp: imx8mp: port M7 core to HWMv2 

Port M7 core of imx8mp to HWMv2

Signed-off-by: default avatarDaniel DeGrasse <daniel.degrasse@nxp.com>
parent 3f9e7068

soc/nxp/imx/imx8m/CMakeLists.txt

+4 −0
Changes for soc/nxp/imx/imx8m/CMakeLists.txt: 4 added lines, 0 removed lines.
Original line number Diff line number Diff line
@@ -42,3 +42,7 @@ endif() 
if(CONFIG_SOC_MIMX8MM6_M4)

  add_subdirectory(m4_mini)

endif()



if(CONFIG_SOC_MIMX8MP_M7)

  add_subdirectory(m7)

endif()

soc/nxp/imx/imx8m/Kconfig

+34 −0
Changes for soc/nxp/imx/imx8m/Kconfig: 34 added lines, 0 removed lines.
Original line number Diff line number Diff line
@@ -49,6 +49,40 @@ config SOC_MIMX8MP_ADSP 
	select HAS_MCUX_IOMUXC if PINCTRL

	select PINCTRL_IMX if HAS_MCUX_IOMUXC



config SOC_MIMX8MP_M7

	select ARM

	select CPU_CORTEX_M7

	select CPU_HAS_FPU

	select CPU_HAS_ICACHE

	select CPU_HAS_DCACHE

	select INIT_VIDEO_PLL

	select HAS_MCUX

	select HAS_MCUX_CCM

	select HAS_MCUX_RDC

	select CPU_HAS_ARM_MPU

	select CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS

	select ARM_MPU

	select HAS_MCUX_IGPIO

	select HAS_MCUX_IOMUXC



config MCUX_CORE_SUFFIX

	default "_ca53" if SOC_MIMX8MM6_A53 || SOC_MIMX8MN6_A53 || SOC_MIMX8ML8_A53

	default "_dsp" if SOC_MIMX8MP_ADSP



if SOC_MIMX8MP_M7



choice CODE_LOCATION

	prompt "Code location selection"



config CODE_ITCM

	bool "Link code into internal instruction tightly coupled memory (ITCM)"



config CODE_DDR

	bool "Link code into DDR memory"



endchoice



config INIT_VIDEO_PLL

	bool "Initialize Video PLL"



endif # SOC_MIMX8MP_M7

soc/soc_legacy/arm/nxp_imx/mimx8ml8_m7/Kconfig.defconfig.mimx8ml8_m7→soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8ml8.m7

+12 −2
Changes for soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8ml8.m7: 12 added lines, 2 removed lines.
Original line number Diff line number Diff line 
# MIMX8ML8 SoC defconfig



# Copyright (c) 2021, Laird Connectivity

# Copyright 2024 NXP

# SPDX-License-Identifier: Apache-2.0



if SOC_MIMX8ML8

if SOC_MIMX8MP_M7



config SOC

	string
@@ -40,4 +41,13 @@ config FLASH_BASE_ADDRESS 


endif # CODE_DDR



endif # SOC_MIMX8ML8
 
config NUM_IRQS

	int

	# must be >= the highest interrupt number used

	default 159



config PINCTRL_IMX

	default y if HAS_MCUX_IOMUXC

	depends on PINCTRL



endif # SOC_MIMX8MP_M7

soc/nxp/imx/imx8m/Kconfig.soc

+6 −0
Changes for soc/nxp/imx/imx8m/Kconfig.soc: 6 added lines, 0 removed lines.
Original line number Diff line number Diff line
@@ -44,6 +44,12 @@ config SOC_MIMX8MP_ADSP 
	help

	  Enable support for NXP i.MX 8MPLUS Audio DSP



config SOC_MIMX8MP_M7

	bool

	select SOC_MIMX8MP

	help

	  Enable support for NXP i.MX 8MPLUS M7 MCU



config SOC_TOOLCHAIN_NAME

	string

	default "nxp_imx8m_adsp" if SOC_MIMX8MP_ADSP

soc/soc_legacy/arm/nxp_imx/mimx8ml8_m7/CMakeLists.txt→soc/nxp/imx/imx8m/m7/CMakeLists.txt

+2 −0
Changes for soc/nxp/imx/imx8m/m7/CMakeLists.txt: 2 added lines, 0 removed lines.
Original line number Diff line number Diff line 
#

# Copyright (c) 2021, Laird Connectivity

# Copyright 2024 NXP

#

# SPDX-License-Identifier: Apache-2.0

#



zephyr_include_directories(${ZEPHYR_BASE}/drivers)

zephyr_include_directories(.)



zephyr_sources(

  soc.c

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