Commit 05b462a9 authored by Sylvio Alves's avatar Sylvio Alves Committed by Mahesh Mahadevan
Browse files

soc: esp32s2: add cache mode disabled option 



Update data cache mode to work when data cache
is set to 0KB.

Signed-off-by: default avatarSylvio Alves <sylvio.alves@espressif.com>
parent 279f4b8a

soc/espressif/esp32s2/soc_cache.c

+11 −3
Original line number Diff line number Diff line
@@ -24,7 +24,9 @@ 
/*

 * Data Cache definitions

 */

#if defined(CONFIG_ESP32S2_DATA_CACHE_8KB)

#if defined(CONFIG_ESP32S2_DATA_CACHE_0KB)

#define ESP32S2_DCACHE_SIZE CACHE_SIZE_0KB

#elif defined(CONFIG_ESP32S2_DATA_CACHE_8KB)

#define ESP32S2_DCACHE_SIZE CACHE_SIZE_8KB

#else

#define ESP32S2_DCACHE_SIZE CACHE_SIZE_16KB
@@ -66,7 +68,10 @@ void IRAM_ATTR esp_config_data_cache_mode(void) 
	cache_line_size_t cache_line_size;



#if CONFIG_ESP32S2_INSTRUCTION_CACHE_8KB

#if CONFIG_ESP32S2_DATA_CACHE_8KB

#if CONFIG_ESP32S2_DATA_CACHE_0KB

	Cache_Allocate_SRAM(CACHE_MEMORY_ICACHE_LOW, CACHE_MEMORY_INVALID, CACHE_MEMORY_INVALID,

			    CACHE_MEMORY_INVALID);

#elif CONFIG_ESP32S2_DATA_CACHE_8KB

	esp_rom_Cache_Allocate_SRAM(CACHE_MEMORY_ICACHE_LOW, CACHE_MEMORY_DCACHE_LOW,

				CACHE_MEMORY_INVALID, CACHE_MEMORY_INVALID);

#else
@@ -74,7 +79,10 @@ void IRAM_ATTR esp_config_data_cache_mode(void) 
				CACHE_MEMORY_DCACHE_HIGH, CACHE_MEMORY_INVALID);

#endif

#else

#if CONFIG_ESP32S2_DATA_CACHE_8KB

#if CONFIG_ESP32S2_DATA_CACHE_0KB

	Cache_Allocate_SRAM(CACHE_MEMORY_ICACHE_LOW, CACHE_MEMORY_ICACHE_HIGH, CACHE_MEMORY_INVALID,

			    CACHE_MEMORY_INVALID);

#elif CONFIG_ESP32S2_DATA_CACHE_8KB

	esp_rom_Cache_Allocate_SRAM(CACHE_MEMORY_ICACHE_LOW, CACHE_MEMORY_ICACHE_HIGH,

				CACHE_MEMORY_DCACHE_LOW, CACHE_MEMORY_INVALID);

#else

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