Commit 6e2594a8 authored by Guillaume Gautier's avatar Guillaume Gautier Committed by Erwan Gouriou
Browse files

stm32cube: update stm32u5 to cube version V1.2.0 

Update Cube version for STM32U5xx series
on https://github.com/STMicroelectronics
from version v1.1.1
to version v1.2.0

Signed-off-by: default avatarGuillaume Gautier <guillaume.gautier-ext@st.com>
parent d5c7a80e

stm32cube/stm32u5xx/README

+2 −9
Changes for stm32cube/stm32u5xx/README: 2 added lines, 9 removed lines.
Original line number Diff line number Diff line
@@ -6,7 +6,7 @@ Origin: 
   http://www.st.com/en/embedded-software/stm32cubeu5.html



Status:

   version v1.1.1

   version v1.2.0



Purpose:

   ST Microelectronics official MCU package for STM32U5 series.
@@ -23,7 +23,7 @@ URL: 
   https://github.com/STMicroelectronics/STM32CubeU5



Commit:

   334453b66a983bb5d3dbc7ebdb0040407191f7d5

   4782b741ef3491c653b44be88b088de444f99397



Maintained-by:

   External
@@ -49,11 +49,4 @@ Patch List: 
   Impacted files: drivers/include/Legacy/stm32_hal_legacy.h

   Internal reference: 134618



   *Wrap define UNUSED with an ifndef

     This will prevent a compiler warning for the case the UNUSED macro

     is already defined elsewhere in the project

     Impacted files:

      drivers/include/stm32u5xx_hal_def.h

     ST Internal Reference: 136825



   See release_note.html from STM32Cube

stm32cube/stm32u5xx/drivers/include/Legacy/stm32_hal_legacy.h

+393 −47

File changed.

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stm32cube/stm32u5xx/drivers/include/stm32_assert_template.h

deleted100644 → 0
+0 −53
Changes for stm32cube/stm32u5xx/drivers/include/stm32_assert_template.h: 0 added lines, 53 removed lines.
Original line number Diff line number Diff line 
/**

  ******************************************************************************

  * @file    stm32_assert.h

  * @author  MCD Application Team

  * @brief   STM32 assert template file.

  *          This file should be copied to the application folder and renamed

  *          to stm32_assert.h.

  ******************************************************************************

  * @attention

  *

  * Copyright (c) 2021 STMicroelectronics.

  * All rights reserved.

  *

  * This software is licensed under terms that can be found in the LICENSE file

  * in the root directory of this software component.

  * If no LICENSE file comes with this software, it is provided AS-IS.

  *

  ******************************************************************************

  */



/* Define to prevent recursive inclusion -------------------------------------*/

#ifndef __STM32_ASSERT_H

#define __STM32_ASSERT_H



#ifdef __cplusplus

extern "C" {

#endif



/* Exported types ------------------------------------------------------------*/

/* Exported constants --------------------------------------------------------*/

/* Includes ------------------------------------------------------------------*/

/* Exported macro ------------------------------------------------------------*/

#ifdef  USE_FULL_ASSERT

/**

  * @brief  The assert_param macro is used for function's parameters check.

  * @param  expr If expr is false, it calls assert_failed function

  *         which reports the name of the source file and the source

  *         line number of the call that failed.

  *         If expr is true, it returns no value.

  * @retval None

  */

#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))

/* Exported functions ------------------------------------------------------- */

void assert_failed(uint8_t *file, uint32_t line);

#else

#define assert_param(expr) ((void)0U)

#endif /* USE_FULL_ASSERT */



#ifdef __cplusplus

}

#endif



#endif /* __STM32_ASSERT_H */

stm32cube/stm32u5xx/drivers/include/stm32u5xx_hal.h

+94 −33
Changes for stm32cube/stm32u5xx/drivers/include/stm32u5xx_hal.h: 94 added lines, 33 removed lines.
Original line number Diff line number Diff line
@@ -200,12 +200,12 @@ extern HAL_TickFreqTypeDef uwTickFreq; 


/** @brief  OTG HS PHY reference clock frequency selection

  */

#define SYSCFG_OTG_HS_PHY_CLK_SELECT_1        (0x00000003U)  /*!< OTG_HS PHY reference clock frequency 16Mhz */

#define SYSCFG_OTG_HS_PHY_CLK_SELECT_2        (0x00000008U)  /*!< OTG_HS PHY reference clock frequency 19.2Mhz */

#define SYSCFG_OTG_HS_PHY_CLK_SELECT_3        (0x00000009U)  /*!< OTG_HS PHY reference clock frequency 20Mhz */

#define SYSCFG_OTG_HS_PHY_CLK_SELECT_4        (0x0000000AU)  /*!< OTG_HS PHY reference clock frequency 24Mhz */

#define SYSCFG_OTG_HS_PHY_CLK_SELECT_5        (0x0000000EU)  /*!< OTG_HS PHY reference clock frequency 26Mhz */

#define SYSCFG_OTG_HS_PHY_CLK_SELECT_6        (0x0000000BU)  /*!< OTG_HS PHY reference clock frequency 32Mhz */

#define SYSCFG_OTG_HS_PHY_CLK_SELECT_1    (SYSCFG_OTGHSPHYCR_CLKSEL_0 | SYSCFG_OTGHSPHYCR_CLKSEL_1)                               /*!< 16Mhz */

#define SYSCFG_OTG_HS_PHY_CLK_SELECT_2    SYSCFG_OTGHSPHYCR_CLKSEL_3                                                              /*!< 19.2Mhz */

#define SYSCFG_OTG_HS_PHY_CLK_SELECT_3    (SYSCFG_OTGHSPHYCR_CLKSEL_0 | SYSCFG_OTGHSPHYCR_CLKSEL_3)                               /*!< 20Mhz */

#define SYSCFG_OTG_HS_PHY_CLK_SELECT_4    (SYSCFG_OTGHSPHYCR_CLKSEL_1 | SYSCFG_OTGHSPHYCR_CLKSEL_3)                               /*!< 24Mhz */

#define SYSCFG_OTG_HS_PHY_CLK_SELECT_5    (SYSCFG_OTGHSPHYCR_CLKSEL_1 | SYSCFG_OTGHSPHYCR_CLKSEL_2 | SYSCFG_OTGHSPHYCR_CLKSEL_3)  /*!< 26Mhz */

#define SYSCFG_OTG_HS_PHY_CLK_SELECT_6    (SYSCFG_OTGHSPHYCR_CLKSEL_0 | SYSCFG_OTGHSPHYCR_CLKSEL_1 | SYSCFG_OTGHSPHYCR_CLKSEL_3)  /*!< 32Mhz */

/**

  * @}

  */
@@ -217,8 +217,8 @@ extern HAL_TickFreqTypeDef uwTickFreq; 
/** @brief  OTG HS PHY Power Down config

  */



#define SYSCFG_OTG_HS_PHY_POWER_ON          (0x00000000U)  /*!< PHY state machine, bias and OTG PHY PLL remain powered */

#define SYSCFG_OTG_HS_PHY_POWER_DOWN        (0x00000001U)  /*!< PHY state machine, bias and OTG PHY PLL are powered down */

#define SYSCFG_OTG_HS_PHY_POWER_ON        0x00000000U                /*!< PHY state machine, bias and OTG PHY PLL are powered down */

#define SYSCFG_OTG_HS_PHY_POWER_DOWN      SYSCFG_OTGHSPHYCR_PDCTRL   /*!< PHY state machine, bias and OTG PHY PLL remain powered */



/**

  * @}
@@ -228,8 +228,45 @@ extern HAL_TickFreqTypeDef uwTickFreq; 
  * @{

  */



#define SYSCFG_OTG_HS_PHY_UNDERRESET       (0x00000000U)  /*!< PHY under reset*/

#define SYSCFG_OTG_HS_PHY_ENABLE           (0x00000001U)  /*!< PHY enabled */

#define SYSCFG_OTG_HS_PHY_UNDERRESET  0x00000000U              /*!< PHY under reset */

#define SYSCFG_OTG_HS_PHY_ENABLE      SYSCFG_OTGHSPHYCR_EN     /*!< PHY enabled */



/** @defgroup SYSCFG_OTG_PHYTUNER_PreemphasisCurrent  OTG PHYTUNER Preemphasis Current

  * @{

  */



/** @brief  High-speed (HS) transmitter preemphasis current control

  */

#define SYSCFG_OTG_HS_PHY_PREEMP_DISABLED   0x00000000U                                                                             /*!< HS transmitter preemphasis circuit disabled */

#define SYSCFG_OTG_HS_PHY_PREEMP_1X         SYSCFG_OTGHSPHYTUNER2_TXPREEMPAMPTUNE_0                                                 /*!< HS transmitter preemphasis circuit sources 1x preemphasis current */

#define SYSCFG_OTG_HS_PHY_PREEMP_2X         SYSCFG_OTGHSPHYTUNER2_TXPREEMPAMPTUNE_1                                                 /*!< HS transmitter preemphasis circuit sources 2x preemphasis current */

#define SYSCFG_OTG_HS_PHY_PREEMP_3X         (SYSCFG_OTGHSPHYTUNER2_TXPREEMPAMPTUNE_0 | SYSCFG_OTGHSPHYTUNER2_TXPREEMPAMPTUNE_1)     /*!< HS transmitter preemphasis circuit sources 3x preemphasis current */



/**

  * @}

  */



/** @defgroup SYSCFG_OTG_PHYTUNER_SquelchThreshold  OTG PHYTUNER Squelch Threshold

  * @{

  */



/** @brief Squelch threshold adjustment

  */

#define SYSCFG_OTG_HS_PHY_SQUELCH_15PERCENT       0x00000000U                                                                             /*!< +15% (recommended value) */

#define SYSCFG_OTG_HS_PHY_SQUELCH_0PERCENT        (SYSCFG_OTGHSPHYTUNER2_SQRXTUNE_0 | SYSCFG_OTGHSPHYTUNER2_SQRXTUNE_1)                   /*!< 0% (default value) */



/**

  * @}

  */



/** @defgroup SYSCFG_OTG_PHYTUNER_DisconnectThreshold  OTG PHYTUNER Disconnect Threshold

  * @{

  */



/** @brief Disconnect threshold adjustment

  */

#define SYSCFG_OTG_HS_PHY_DISCONNECT_5_9PERCENT    SYSCFG_OTGHSPHYTUNER2_COMPDISTUNE_1     /*!< +5.9% (recommended value) */

#define SYSCFG_OTG_HS_PHY_DISCONNECT_0PERCENT      SYSCFG_OTGHSPHYTUNER2_COMPDISTUNE_0     /*!< 0% (default value) */



/**

  * @}
@@ -302,6 +339,16 @@ extern HAL_TickFreqTypeDef uwTickFreq; 
#define __HAL_DBGMCU_UNFREEZE_I2C4()            CLEAR_BIT(DBGMCU->APB1FZR2, DBGMCU_APB1FZR2_DBG_I2C4_STOP)

#endif /* DBGMCU_APB1FZR2_DBG_I2C4_STOP */



#if defined(DBGMCU_APB1FZR2_DBG_I2C5_STOP)

#define __HAL_DBGMCU_FREEZE_I2C5()              SET_BIT(DBGMCU->APB1FZR2, DBGMCU_APB1FZR2_DBG_I2C5_STOP)

#define __HAL_DBGMCU_UNFREEZE_I2C5()            CLEAR_BIT(DBGMCU->APB1FZR2, DBGMCU_APB1FZR2_DBG_I2C5_STOP)

#endif /* DBGMCU_APB1FZR2_DBG_I2C5_STOP */



#if defined(DBGMCU_APB1FZR2_DBG_I2C6_STOP)

#define __HAL_DBGMCU_FREEZE_I2C6()              SET_BIT(DBGMCU->APB1FZR2, DBGMCU_APB1FZR2_DBG_I2C6_STOP)

#define __HAL_DBGMCU_UNFREEZE_I2C6()            CLEAR_BIT(DBGMCU->APB1FZR2, DBGMCU_APB1FZR2_DBG_I2C6_STOP)

#endif /* DBGMCU_APB1FZR2_DBG_I2C6_STOP */



#if defined(DBGMCU_APB1FZR2_DBG_LPTIM2_STOP)

#define __HAL_DBGMCU_FREEZE_LPTIM2()            SET_BIT(DBGMCU->APB1FZR2, DBGMCU_APB1FZR2_DBG_LPTIM2_STOP)

#define __HAL_DBGMCU_UNFREEZE_LPTIM2()          CLEAR_BIT(DBGMCU->APB1FZR2, DBGMCU_APB1FZR2_DBG_LPTIM2_STOP)
@@ -596,28 +643,31 @@ extern HAL_TickFreqTypeDef uwTickFreq; 
#endif /* __ARM_FEATURE_CMSE */



#ifdef SYSCFG_OTGHSPHYCR_EN

#define IS_SYSCFG_OTGPHY_REFERENCE_CLOCK(__VALUE__) ((((__VALUE__) & SYSCFG_OTG_HS_PHY_CLK_SELECT_1) == \

                                                      SYSCFG_OTG_HS_PHY_CLK_SELECT_1) || \

                                                     (((__VALUE__) & SYSCFG_OTG_HS_PHY_CLK_SELECT_2) == \

                                                      SYSCFG_OTG_HS_PHY_CLK_SELECT_2) || \

                                                     (((__VALUE__) & SYSCFG_OTG_HS_PHY_CLK_SELECT_3) == \

                                                      SYSCFG_OTG_HS_PHY_CLK_SELECT_3) || \

                                                     (((__VALUE__) & SYSCFG_OTG_HS_PHY_CLK_SELECT_4) == \

                                                      SYSCFG_OTG_HS_PHY_CLK_SELECT_4) || \

                                                     (((__VALUE__) & SYSCFG_OTG_HS_PHY_CLK_SELECT_5) == \

                                                      SYSCFG_OTG_HS_PHY_CLK_SELECT_5) || \

                                                     (((__VALUE__) & SYSCFG_OTG_HS_PHY_CLK_SELECT_6) == \

                                                      SYSCFG_OTG_HS_PHY_CLK_SELECT_6))



#define IS_SYSCFG_OTGPHY_POWERDOWN_CONFIG(__VALUE__) ((((__VALUE__) & SYSCFG_OTG_HS_PHY_POWER_DOWN) == \

                                                       SYSCFG_OTG_HS_PHY_POWER_DOWN) || \

                                                      (((__VALUE__) & SYSCFG_OTG_HS_PHY_POWER_ON) == \

                                                       SYSCFG_OTG_HS_PHY_POWER_ON))



#define IS_SYSCFG_OTGPHY_CONFIG(__VALUE__) ((((__VALUE__) & SYSCFG_OTG_HS_PHY_UNDERRESET) == \

                                             SYSCFG_OTG_HS_PHY_UNDERRESET) || \

                                            (((__VALUE__) & SYSCFG_OTG_HS_PHY_ENABLE) == SYSCFG_OTG_HS_PHY_ENABLE))

#define IS_SYSCFG_OTGPHY_REFERENCE_CLOCK(__VALUE__)   (((__VALUE__) == SYSCFG_OTG_HS_PHY_CLK_SELECT_1) || \

                                                       ((__VALUE__) == SYSCFG_OTG_HS_PHY_CLK_SELECT_2) || \

                                                       ((__VALUE__) == SYSCFG_OTG_HS_PHY_CLK_SELECT_3) || \

                                                       ((__VALUE__) == SYSCFG_OTG_HS_PHY_CLK_SELECT_4) || \

                                                       ((__VALUE__) == SYSCFG_OTG_HS_PHY_CLK_SELECT_5) || \

                                                       ((__VALUE__) == SYSCFG_OTG_HS_PHY_CLK_SELECT_6))



#define IS_SYSCFG_OTGPHY_POWERDOWN_CONFIG(__VALUE__)  (((__VALUE__) == SYSCFG_OTG_HS_PHY_POWER_DOWN) || \

                                                       ((__VALUE__) == SYSCFG_OTG_HS_PHY_POWER_ON))



#define IS_SYSCFG_OTGPHY_CONFIG(__VALUE__)            (((__VALUE__) == SYSCFG_OTG_HS_PHY_UNDERRESET) || \

                                                       ((__VALUE__) == SYSCFG_OTG_HS_PHY_ENABLE))



#define IS_SYSCFG_OTGPHY_DISCONNECT(__VALUE__)        (((__VALUE__) == SYSCFG_OTG_HS_PHY_DISCONNECT_5_9PERCENT) || \

                                                       ((__VALUE__) == SYSCFG_OTG_HS_PHY_DISCONNECT_0PERCENT))



#define IS_SYSCFG_OTGPHY_SQUELCH(__VALUE__)           (((__VALUE__) == SYSCFG_OTG_HS_PHY_SQUELCH_0PERCENT) || \

                                                       ((__VALUE__) == SYSCFG_OTG_HS_PHY_SQUELCH_15PERCENT))



#define IS_SYSCFG_OTGPHY_PREEMPHASIS(__VALUE__)       (((__VALUE__) == SYSCFG_OTG_HS_PHY_PREEMP_DISABLED) || \

                                                       ((__VALUE__) == SYSCFG_OTG_HS_PHY_PREEMP_1X) || \

                                                       ((__VALUE__) == SYSCFG_OTG_HS_PHY_PREEMP_2X) || \

                                                       ((__VALUE__) == SYSCFG_OTG_HS_PHY_PREEMP_3X))

#endif /* SYSCFG_OTGHSPHYCR_EN */



/**

  * @}

  */
@@ -668,6 +718,9 @@ void HAL_ResumeTick(void); 
uint32_t HAL_GetHalVersion(void);

uint32_t HAL_GetREVID(void);

uint32_t HAL_GetDEVID(void);

uint32_t HAL_GetUIDw0(void);

uint32_t HAL_GetUIDw1(void);

uint32_t HAL_GetUIDw2(void);



/**

  * @}
@@ -700,13 +753,17 @@ void HAL_SYSCFG_VREFBUF_TrimmingConfig(uint32_t TrimmingValue); 
HAL_StatusTypeDef HAL_SYSCFG_EnableVREFBUF(void);

void HAL_SYSCFG_DisableVREFBUF(void);

#ifdef SYSCFG_OTGHSPHYCR_EN

void HAL_SYSCFG_SetOTGPHYReferenceClockSelection(uint32_t RefClockSelection);

void HAL_SYSCFG_SetOTGPHYReferenceClockSelection(uint32_t RefClkSelection);

void HAL_SYSCFG_SetOTGPHYPowerDownConfig(uint32_t PowerDownConfig);

void HAL_SYSCFG_EnableOTGPHY(uint32_t OTGPHYConfig);

void HAL_SYSCFG_SetOTGPHYDisconnectThreshold(uint32_t DisconnectThreshold);

void HAL_SYSCFG_SetOTGPHYSquelchThreshold(uint32_t SquelchThreshold);

void HAL_SYSCFG_SetOTGPHYPreemphasisCurrent(uint32_t PreemphasisCurrent);

#endif /* SYSCFG_OTGHSPHYCR_EN */

void HAL_SYSCFG_EnableIOAnalogSwitchBooster(void);

void HAL_SYSCFG_DisableIOAnalogSwitchBooster(void);



void HAL_SYSCFG_EnableSRAMCached(void);

void HAL_SYSCFG_DisableSRAMCached(void);

void HAL_SYSCFG_EnableVddCompensationCell(void);

void HAL_SYSCFG_EnableVddIO2CompensationCell(void);

#if defined(SYSCFG_CCCSR_EN3)
@@ -761,6 +818,10 @@ HAL_StatusTypeDef HAL_SYSCFG_GetConfigAttributes(uint32_t Item, uint32_t *pAttri 
  * @}

  */



/**

  * @}

  */



#ifdef __cplusplus

}

#endif

stm32cube/stm32u5xx/drivers/include/stm32u5xx_hal_adc.h

+53 −23

File changed.

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