Commit 386f1f7d authored by IBEN EL HADJ MESSAOUD Marwa's avatar IBEN EL HADJ MESSAOUD Marwa Committed by Erwan Gouriou
Browse files

stm32cube: update stm32f3 to cube version V1.11.5 

Update Cube version for STM32F3xx series
on https://github.com/STMicroelectronics
from version v1.11.4
to version v1.11.5

Signed-off-by: default avatarIBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
parent 2105cabf

stm32cube/stm32f3xx/README

+2 −2
Changes for stm32cube/stm32f3xx/README: 2 added lines, 2 removed lines.
Original line number Diff line number Diff line
@@ -6,7 +6,7 @@ Origin: 
   http://www.st.com/en/embedded-software/stm32cubef3.html



Status:

   version v1.11.4

   version v1.11.5



Purpose:

   ST Microelectronics official MCU package for STM32F3 series.
@@ -23,7 +23,7 @@ URL: 
   https://github.com/STMicroelectronics/STM32CubeF3



Commit:

   e805a235c431db2e01cea47d795fa83d597c64af

   8d9115fc51dd84a08864add769e1cba6f95b8857



Maintained-by:

   External

stm32cube/stm32f3xx/drivers/include/Legacy/stm32_hal_legacy.h

+47 −16
Changes for stm32cube/stm32f3xx/drivers/include/Legacy/stm32_hal_legacy.h: 47 added lines, 16 removed lines.
Original line number Diff line number Diff line
@@ -7,7 +7,7 @@ 
  ******************************************************************************

  * @attention

  *

  * Copyright (c) 2023 STMicroelectronics.

  * Copyright (c) 2024 STMicroelectronics.

  * All rights reserved.

  *

  * This software is licensed under terms that can be found in the LICENSE file
@@ -37,16 +37,12 @@ extern "C" { 
#define AES_CLEARFLAG_CCF               CRYP_CLEARFLAG_CCF

#define AES_CLEARFLAG_RDERR             CRYP_CLEARFLAG_RDERR

#define AES_CLEARFLAG_WRERR             CRYP_CLEARFLAG_WRERR

#if defined(STM32U5) || defined(STM32H7) || defined(STM32MP1)

#if defined(STM32H7) || defined(STM32MP1)

#define CRYP_DATATYPE_32B               CRYP_NO_SWAP

#define CRYP_DATATYPE_16B               CRYP_HALFWORD_SWAP

#define CRYP_DATATYPE_8B                CRYP_BYTE_SWAP

#define CRYP_DATATYPE_1B                CRYP_BIT_SWAP

#if defined(STM32U5)

#define CRYP_CCF_CLEAR                  CRYP_CLEAR_CCF

#define CRYP_ERR_CLEAR                  CRYP_CLEAR_RWEIF

#endif /* STM32U5 */

#endif /* STM32U5 || STM32H7 || STM32MP1 */

#endif /* STM32H7 || STM32MP1 */

/**

  * @}

  */
@@ -279,7 +275,7 @@ extern "C" { 
#define DAC_WAVEGENERATION_NOISE                        DAC_WAVE_NOISE

#define DAC_WAVEGENERATION_TRIANGLE                     DAC_WAVE_TRIANGLE



#if defined(STM32G4) || defined(STM32L5) || defined(STM32H7) || defined (STM32U5)

#if defined(STM32G4) || defined(STM32H7) || defined (STM32U5)

#define DAC_CHIPCONNECT_DISABLE       DAC_CHIPCONNECT_EXTERNAL

#define DAC_CHIPCONNECT_ENABLE        DAC_CHIPCONNECT_INTERNAL

#endif
@@ -552,6 +548,16 @@ extern "C" { 
#define OB_SRAM134_RST_ERASE          OB_SRAM_RST_ERASE

#define OB_SRAM134_RST_NOT_ERASE      OB_SRAM_RST_NOT_ERASE

#endif /* STM32U5 */

#if defined(STM32U0)

#define OB_USER_nRST_STOP             OB_USER_NRST_STOP

#define OB_USER_nRST_STDBY            OB_USER_NRST_STDBY

#define OB_USER_nRST_SHDW             OB_USER_NRST_SHDW

#define OB_USER_nBOOT_SEL             OB_USER_NBOOT_SEL

#define OB_USER_nBOOT0                OB_USER_NBOOT0

#define OB_USER_nBOOT1                OB_USER_NBOOT1

#define OB_nBOOT0_RESET               OB_NBOOT0_RESET

#define OB_nBOOT0_SET                 OB_NBOOT0_SET

#endif /* STM32U0 */



/**

  * @}
@@ -1243,10 +1249,10 @@ extern "C" { 
#define RTC_TAMPERPIN_PA0  RTC_TAMPERPIN_POS1

#define RTC_TAMPERPIN_PI8  RTC_TAMPERPIN_POS1



#if defined(STM32H5)

#if defined(STM32H5) || defined(STM32H7RS)

#define TAMP_SECRETDEVICE_ERASE_NONE        TAMP_DEVICESECRETS_ERASE_NONE

#define TAMP_SECRETDEVICE_ERASE_BKP_SRAM    TAMP_DEVICESECRETS_ERASE_BKPSRAM

#endif /* STM32H5 */

#endif /* STM32H5 || STM32H7RS */



#if defined(STM32WBA)

#define TAMP_SECRETDEVICE_ERASE_NONE            TAMP_DEVICESECRETS_ERASE_NONE
@@ -1258,10 +1264,10 @@ extern "C" { 
#define TAMP_SECRETDEVICE_ERASE_ALL             TAMP_DEVICESECRETS_ERASE_ALL

#endif /* STM32WBA */



#if defined(STM32H5) || defined(STM32WBA)

#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)

#define TAMP_SECRETDEVICE_ERASE_DISABLE     TAMP_DEVICESECRETS_ERASE_NONE

#define TAMP_SECRETDEVICE_ERASE_ENABLE      TAMP_SECRETDEVICE_ERASE_ALL

#endif /* STM32H5 || STM32WBA */

#endif /* STM32H5 || STM32WBA || STM32H7RS */



#if defined(STM32F7)

#define RTC_TAMPCR_TAMPXE          RTC_TAMPER_ENABLE_BITS_MASK
@@ -1599,6 +1605,8 @@ extern "C" { 
#define ETH_MAC_SMALL_FIFO_RW_ACTIVE          0x00000006U  /* MAC small FIFO read / write controllers active */

#define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE   0x00000001U  /* MAC MII receive protocol engine active */



#define ETH_TxPacketConfig        ETH_TxPacketConfigTypeDef   /* Transmit Packet Configuration structure definition */



/**

  * @}

  */
@@ -1991,12 +1999,12 @@ extern "C" { 
/** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose

  * @{

  */

#if defined(STM32H5) || defined(STM32WBA)

#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)

#define HAL_RTCEx_SetBoothardwareKey            HAL_RTCEx_LockBootHardwareKey

#define HAL_RTCEx_BKUPBlock_Enable              HAL_RTCEx_BKUPBlock

#define HAL_RTCEx_BKUPBlock_Disable             HAL_RTCEx_BKUPUnblock

#define HAL_RTCEx_Erase_SecretDev_Conf          HAL_RTCEx_ConfigEraseDeviceSecrets

#endif /* STM32H5 || STM32WBA */

#endif /* STM32H5 || STM32WBA || STM32H7RS */



/**

  * @}
@@ -2723,6 +2731,12 @@ extern "C" { 
#define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET

#define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET

#define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET

#if defined(STM32C0)

#define __HAL_RCC_APB1_FORCE_RESET    __HAL_RCC_APB1_GRP1_FORCE_RESET

#define __HAL_RCC_APB1_RELEASE_RESET  __HAL_RCC_APB1_GRP1_RELEASE_RESET

#define __HAL_RCC_APB2_FORCE_RESET    __HAL_RCC_APB1_GRP2_FORCE_RESET

#define __HAL_RCC_APB2_RELEASE_RESET  __HAL_RCC_APB1_GRP2_RELEASE_RESET

#endif /* STM32C0 */

#define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE

#define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE

#define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
@@ -3646,8 +3660,12 @@ extern "C" { 
#define RCC_MCOSOURCE_PLLCLK_NODIV  RCC_MCO1SOURCE_PLLCLK

#define RCC_MCOSOURCE_PLLCLK_DIV2   RCC_MCO1SOURCE_PLLCLK_DIV2



#if defined(STM32U0)

#define RCC_SYSCLKSOURCE_STATUS_PLLR   RCC_SYSCLKSOURCE_STATUS_PLLCLK

#endif



#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \

    defined(STM32WL) || defined(STM32C0)

    defined(STM32WL) || defined(STM32C0) || defined(STM32H7RS) || defined(STM32U0)

#define RCC_RTCCLKSOURCE_NO_CLK     RCC_RTCCLKSOURCE_NONE

#else

#define RCC_RTCCLKSOURCE_NONE       RCC_RTCCLKSOURCE_NO_CLK
@@ -3749,8 +3767,10 @@ extern "C" { 
#define __HAL_RCC_GET_DFSDM_SOURCE  __HAL_RCC_GET_DFSDM1_SOURCE

#define RCC_DFSDM1CLKSOURCE_PCLK    RCC_DFSDM1CLKSOURCE_PCLK2

#define RCC_SWPMI1CLKSOURCE_PCLK    RCC_SWPMI1CLKSOURCE_PCLK1

#if !defined(STM32U0)

#define RCC_LPTIM1CLKSOURCE_PCLK    RCC_LPTIM1CLKSOURCE_PCLK1

#define RCC_LPTIM2CLKSOURCE_PCLK    RCC_LPTIM2CLKSOURCE_PCLK1

#endif



#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1    RCC_DFSDM1AUDIOCLKSOURCE_I2S1

#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2    RCC_DFSDM1AUDIOCLKSOURCE_I2S2
@@ -3896,7 +3916,8 @@ extern "C" { 
  */

#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \

    defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \

    defined (STM32WBA) || defined (STM32H5) || defined (STM32C0)

    defined (STM32WBA) || defined (STM32H5) || \

    defined (STM32C0) || defined (STM32H7RS) ||  defined (STM32U0)

#else

#define __HAL_RTC_CLEAR_FLAG                      __HAL_RTC_EXTI_CLEAR_FLAG

#endif
@@ -3931,6 +3952,13 @@ extern "C" { 
                                                        __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT()))

#endif   /* STM32F1 */



#if defined (STM32F0) || defined (STM32F2) || defined (STM32F3) || defined (STM32F4) || defined (STM32F7) || \

    defined (STM32H7) || \

    defined (STM32L0) || defined (STM32L1) || \

    defined (STM32WB)

#define __HAL_RTC_TAMPER_GET_IT                   __HAL_RTC_TAMPER_GET_FLAG

#endif



#define IS_ALARM                                  IS_RTC_ALARM

#define IS_ALARM_MASK                             IS_RTC_ALARM_MASK

#define IS_TAMPER                                 IS_RTC_TAMPER
@@ -4212,6 +4240,9 @@ extern "C" { 
#define __HAL_TIM_GetCompare            __HAL_TIM_GET_COMPARE



#define TIM_BREAKINPUTSOURCE_DFSDM  TIM_BREAKINPUTSOURCE_DFSDM1



#define TIM_OCMODE_ASSYMETRIC_PWM1      TIM_OCMODE_ASYMMETRIC_PWM1

#define TIM_OCMODE_ASSYMETRIC_PWM2      TIM_OCMODE_ASYMMETRIC_PWM2

/**

  * @}

  */

stm32cube/stm32f3xx/drivers/include/stm32_assert.h

+1 −1
Changes for stm32cube/stm32f3xx/drivers/include/stm32_assert.h: 1 added line, 1 removed line.
Original line number Diff line number Diff line 
/*

 * SPDX-License-Identifier: Apache-2.0

 * Copyright (c) 2021 STMicroelectronics

 * Copyright (c) 2024 STMicroelectronics

 */



#include <stm32f3xx_hal_conf.h>

stm32cube/stm32f3xx/drivers/include/stm32f3xx_hal_can.h

+4 −0
Changes for stm32cube/stm32f3xx/drivers/include/stm32f3xx_hal_can.h: 4 added lines, 0 removed lines.
Original line number Diff line number Diff line
@@ -204,7 +204,11 @@ typedef struct 
/**

  * @brief  CAN handle Structure definition

  */

#if USE_HAL_CAN_REGISTER_CALLBACKS == 1

typedef struct __CAN_HandleTypeDef

#else

typedef struct

#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */

{

  CAN_TypeDef                 *Instance;                 /*!< Register base address */

stm32cube/stm32f3xx/drivers/include/stm32f3xx_hal_cortex.h

+2 −1
Changes for stm32cube/stm32f3xx/drivers/include/stm32f3xx_hal_cortex.h: 2 added lines, 1 removed line.
Original line number Diff line number Diff line
@@ -271,6 +271,8 @@ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb); 
 */

/* Peripheral Control functions ***********************************************/

#if (__MPU_PRESENT == 1U)

void HAL_MPU_EnableRegion(uint32_t RegionNumber);

void HAL_MPU_DisableRegion(uint32_t RegionNumber);

void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);

#endif /* __MPU_PRESENT */

uint32_t HAL_NVIC_GetPriorityGrouping(void);
@@ -421,4 +423,3 @@ void HAL_MPU_Enable(uint32_t MPU_Control); 


#endif /* __STM32F3xx_HAL_CORTEX_H */

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