Commit 10c19f34 authored by Francois Ramu's avatar Francois Ramu Committed by Kumar Gala
Browse files

stm32cube: update stm32g0 to version V1.4.1

Update Cube version for STM32G0xx series
on https://github.com/STMicroelectronics


from version v1.4.0
to version v1.4.1

Signed-off-by: default avatarFrancois Ramu <francois.ramu@st.com>
parent b2a3a443
Loading
Loading
Loading
Loading
+2 −2
Original line number Diff line number Diff line
@@ -6,7 +6,7 @@ Origin:
   http://www.st.com/en/embedded-software/stm32cubeg0.html

Status:
   version v1.4.0
   version v1.4.1

Purpose:
   ST Microelectronics official MCU package for STM32G0 series.
@@ -23,7 +23,7 @@ URL:
   https://github.com/STMicroelectronics/STM32CubeG0

Commit:
   c6cb8664ae0542c33f81046d735ee9492d5df0f3
   5cb06333a6a43cefbe145f10a5aa98d3cc4cffee

Maintained-by:
   External
+29 −22
Original line number Diff line number Diff line
@@ -876,24 +876,22 @@ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
#define FLASH_SIZE_DATA_REGISTER        FLASHSIZE_BASE

#if defined(FLASH_DBANK_SUPPORT)
#define FLASH_BANK_SIZE                 (FLASH_SIZE >> 1) /*!< FLASH Bank Size is Flash size divided by 2 */
#else
#define OB_DUAL_BANK_BASE               (FLASH_R_BASE + 0x20U)               /*!< Not use cmsis FLASH alias to avoid iar warning about volatile reading sequence */
#define FLASH_SALES_TYPE_Pos            (24U)
#define FLASH_SALES_TYPE                (0x3UL << FLASH_SALES_TYPE_Pos)     /*!< 0x000001E0 */
#define FLASH_SALES_TYPE_0              (0x1UL << FLASH_SALES_TYPE_Pos)     /*!< 0x01000000 */
#define FLASH_SALES_TYPE_1              (0x2UL << FLASH_SALES_TYPE_Pos)     /*!< 0x02000000 */
#define FLASH_SALES_VALUE               ((*((uint32_t *)PACKAGE_BASE)) & (FLASH_SALES_TYPE))
#define OB_DUAL_BANK_VALUE              ((*((uint32_t *)OB_DUAL_BANK_BASE)) & (FLASH_OPTR_DUAL_BANK))
#define FLASH_BANK_NB                   (((FLASH_SALES_VALUE == 0U) || ((FLASH_SALES_VALUE == FLASH_SALES_TYPE_0) && (OB_DUAL_BANK_VALUE == 0U)))?1U:2U)
#define FLASH_BANK_SIZE                 ((FLASH_BANK_NB==1U)?(FLASH_SIZE):(FLASH_SIZE >> 1U)) /*!< FLASH Bank Size. Divided by 2 if 2 Banks */
#else /* FLASH_DBANK_SUPPORT */
#define FLASH_BANK_SIZE                 (FLASH_SIZE)   /*!< FLASH Bank Size */
#endif
#endif /* FLASH_DBANK_SUPPORT */

#define FLASH_PAGE_SIZE                 0x00000800U    /*!< FLASH Page Size, 2 KBytes */

#if defined(STM32G081xx)||defined(STM32G071xx)||defined(STM32G070xx)
#define FLASH_PAGE_NB                   64U
#elif defined(STM32G0C1xx)||defined(STM32G0B1xx)||defined(STM32G0B0xx)
/* warning : on those product, constant represents number of page per bank */
#define FLASH_PAGE_NB                   128U
#else
#define FLASH_PAGE_NB                   32U
#endif

#define FLASH_PAGE_NB                   (FLASH_BANK_SIZE/FLASH_PAGE_SIZE) /* Number of pages per bank */
#define FLASH_TIMEOUT_VALUE             1000U          /*!< FLASH Execution Timeout, 1 s */

#define FLASH_TYPENONE                  0x00000000U    /*!< No programming Procedure On Going */

#if defined(FLASH_PCROP_SUPPORT)
@@ -947,9 +945,12 @@ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
#define IS_FLASH_PAGE(__PAGE__)                        ((__PAGE__) < FLASH_PAGE_NB)

#if defined(FLASH_DBANK_SUPPORT)
#define IS_FLASH_BANK(__BANK__)                        (((__BANK__) == FLASH_BANK_1)  || \
#define IS_FLASH_BANK(__BANK__)                       \
      ((FLASH_BANK_NB == 2U) ?                         \
      (((__BANK__) == FLASH_BANK_1)  ||               \
      ((__BANK__) == FLASH_BANK_2)  ||                \
                                                        ((__BANK__) == (FLASH_BANK_2 | FLASH_BANK_1)))
      ((__BANK__) == (FLASH_BANK_2 | FLASH_BANK_1))): \
      ((__BANK__) == FLASH_BANK_1))
#else
#define IS_FLASH_BANK(__BANK__)                        ((__BANK__) == FLASH_BANK_1)
#endif
@@ -964,8 +965,11 @@ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
                                                       (((__VALUE__) & ~OPTIONBYTE_ALL) == 0x00U))

#if defined(FLASH_DBANK_SUPPORT)
#define IS_OB_WRPAREA(__VALUE__)                       (((__VALUE__) == OB_WRPAREA_ZONE_A) || ((__VALUE__) == OB_WRPAREA_ZONE_B) || \
                                                        ((__VALUE__) == OB_WRPAREA_ZONE2_A) || ((__VALUE__) == OB_WRPAREA_ZONE2_B))
#define IS_OB_WRPAREA(__VALUE__)                                                     \
      ((FLASH_BANK_NB == 2U) ?                                                        \
      (((__VALUE__) == OB_WRPAREA_ZONE_A) || ((__VALUE__) == OB_WRPAREA_ZONE_B) ||   \
      ((__VALUE__) == OB_WRPAREA_ZONE2_A) || ((__VALUE__) == OB_WRPAREA_ZONE2_B)) :  \
      (((__VALUE__) == OB_WRPAREA_ZONE_A) || ((__VALUE__) == OB_WRPAREA_ZONE_B)))
#else
#define IS_OB_WRPAREA(__VALUE__)                       (((__VALUE__) == OB_WRPAREA_ZONE_A) || ((__VALUE__) == OB_WRPAREA_ZONE_B))
#endif
@@ -981,8 +985,11 @@ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);

#if defined(FLASH_PCROP_SUPPORT)
#if defined(FLASH_DBANK_SUPPORT)
#define IS_OB_PCROP_CONFIG(__CONFIG__)                 (((__CONFIG__) & ~(OB_PCROP_ZONE_A | OB_PCROP_ZONE_B | \
                                                                          OB_PCROP_ZONE2_A | OB_PCROP_ZONE2_B | OB_PCROP_RDP_ERASE)) == 0x00U)
#define IS_OB_PCROP_CONFIG(__CONFIG__)                                                           \
      ((FLASH_BANK_NB == 2U) ?                                                                    \
      (((__CONFIG__) & ~(OB_PCROP_ZONE_A | OB_PCROP_ZONE_B |                                     \
                         OB_PCROP_ZONE2_A | OB_PCROP_ZONE2_B | OB_PCROP_RDP_ERASE)) == 0x00U):   \
      (((__CONFIG__) & ~(OB_PCROP_ZONE_A | OB_PCROP_ZONE_B | OB_PCROP_RDP_ERASE)) == 0x00U))
#else
#define IS_OB_PCROP_CONFIG(__CONFIG__)                 (((__CONFIG__) & ~(OB_PCROP_ZONE_A | OB_PCROP_ZONE_B | OB_PCROP_RDP_ERASE)) == 0x00U)
#endif
+1 −1
Original line number Diff line number Diff line
@@ -57,7 +57,7 @@
  */
#define __STM32G0xx_HAL_VERSION_MAIN   (0x01U) /*!< [31:24] main version */
#define __STM32G0xx_HAL_VERSION_SUB1   (0x04U) /*!< [23:16] sub1 version */
#define __STM32G0xx_HAL_VERSION_SUB2   (0x00U) /*!< [15:8]  sub2 version */
#define __STM32G0xx_HAL_VERSION_SUB2   (0x01U) /*!< [15:8]  sub2 version */
#define __STM32G0xx_HAL_VERSION_RC     (0x00U) /*!< [7:0]  release candidate */
#define __STM32G0xx_HAL_VERSION         ((__STM32G0xx_HAL_VERSION_MAIN << 24U)\
                                        |(__STM32G0xx_HAL_VERSION_SUB1 << 16U)\
+13 −9
Original line number Diff line number Diff line
@@ -851,8 +851,8 @@ static void FLASH_OB_PCROP1AConfig(uint32_t PCROPConfig, uint32_t PCROP1AStartAd
  assert_param(IS_OB_PCROP_CONFIG(PCROPConfig));

#if defined(FLASH_DBANK_SUPPORT)
  /* Check if banks are swapped */
  if ((FLASH->OPTR & FLASH_OPTR_nSWAP_BANK) != FLASH_OPTR_nSWAP_BANK)
  /* Check if banks are swapped (valid if only one bank) */
  if (((FLASH->OPTR & FLASH_OPTR_nSWAP_BANK) != FLASH_OPTR_nSWAP_BANK) && (FLASH_BANK_NB == 2U))
  {
    /* Check the parameters */
    assert_param(IS_FLASH_MAIN_SECONDHALF_MEM_ADDRESS(PCROP1AStartAddr));
@@ -920,8 +920,8 @@ static void FLASH_OB_PCROP1BConfig(uint32_t PCROP1BStartAddr, uint32_t PCROP1BEn
  uint32_t ropbase;

#if defined(FLASH_DBANK_SUPPORT)
  /* Check if banks are swapped */
  if ((FLASH->OPTR & FLASH_OPTR_nSWAP_BANK) != FLASH_OPTR_nSWAP_BANK)
  /* Check if banks are swapped (valid if only one bank) */
  if (((FLASH->OPTR & FLASH_OPTR_nSWAP_BANK) != FLASH_OPTR_nSWAP_BANK) && (FLASH_BANK_NB == 2U))
  {
    /* Check the parameters */
    assert_param(IS_FLASH_MAIN_SECONDHALF_MEM_ADDRESS(PCROP1BStartAddr));
@@ -966,8 +966,8 @@ static void FLASH_OB_GetPCROP1A(uint32_t *PCROPConfig, uint32_t *PCROP1AStartAdd
  uint32_t ropbase;

#if defined(FLASH_DBANK_SUPPORT)
  /* Check if banks are swapped */
  if ((FLASH->OPTR & FLASH_OPTR_nSWAP_BANK) != FLASH_OPTR_nSWAP_BANK)
  /* Check if banks are swapped (valid if only one bank) */
  if (((FLASH->OPTR & FLASH_OPTR_nSWAP_BANK) != FLASH_OPTR_nSWAP_BANK) && (FLASH_BANK_NB == 2U))
  {
    /* Bank swap, bank 1 read only protection is on second half of Flash */
    ropbase = (FLASH_BASE + FLASH_BANK_SIZE);
@@ -1005,8 +1005,8 @@ static void FLASH_OB_GetPCROP1B(uint32_t *PCROP1BStartAddr, uint32_t *PCROP1BEnd
  uint32_t ropbase;

#if defined(FLASH_DBANK_SUPPORT)
  /* Check if banks are swapped */
  if ((FLASH->OPTR & FLASH_OPTR_nSWAP_BANK) != FLASH_OPTR_nSWAP_BANK)
  /* Check if banks are swapped (valid if only one bank) */
  if (((FLASH->OPTR & FLASH_OPTR_nSWAP_BANK) != FLASH_OPTR_nSWAP_BANK) && (FLASH_BANK_NB == 2U))
  {
    /* Bank swap, bank 1 read only protection is on second half of Flash */
    ropbase = (FLASH_BASE + FLASH_BANK_SIZE);
@@ -1217,7 +1217,11 @@ static void FLASH_OB_SecMemConfig(uint32_t BootEntry, uint32_t SecSize, uint32_t
  /* Check the parameters */
  assert_param(IS_OB_SEC_BOOT_LOCK(BootEntry));
  assert_param(IS_OB_SEC_SIZE(SecSize));

  if ((FLASH_BANK_NB == 2U))
  {
    assert_param(IS_OB_SEC_SIZE(SecSize2));
  }

  /* Set securable memory area configuration */
  secmem = (FLASH->SECR & ~(FLASH_SECR_BOOT_LOCK | FLASH_SECR_SEC_SIZE | FLASH_SECR_SEC_SIZE2));