Commit fff660ce authored by Armando Visconti's avatar Armando Visconti Committed by Kumar Gala
Browse files

ext: stm32cube: revert 71ba2de7 and 9a893202



Revert 71ba2de7:
ext: stm32cube: stm32f4xx: shift I2SR field in PLLI2SCFGR register
(ST Bug tracker ID: 50086)

Revert 9a893202:
ext: stm32cube: stm32f7xx: shift I2SR field in PLLI2SCFGR register
(ST Bug tracker ID: 50108)

This two commits were introduced to shift the PLLR parameter according
to the PLL register field position. After analysis, it appears that
function is actually correct, and issue was actually in parameters
provided that didn't match the API. (see PR #12609)

Signed-off-by: default avatarArmando Visconti <armando.visconti@st.com>
parent c92d8faf
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+0 −7
Original line number Diff line number Diff line
@@ -44,13 +44,6 @@ Patch List:
     drivers/include/stm32f4xx_hal_conf.h
    ST Bug tracker ID: NA. Not a stm32cube issue

   *Add correct shifting to I2SR field in PLLI2SCFGR register
     The I2SR field should be shifted by RCC_PLLI2SCFGR_PLLI2SR_Pos when the PLLI2SCFGR register
     is read or written.
    Impacted files:
     drivers/include/stm32f4xx_ll_rcc.h
    ST Bug tracker ID: 50086

   *Disable new CAN API and enable Legacy API
     A new CAN API has been delivered on recent F4 stm32cube.
     This new API breaks current CAN driver. Disable the new API and enable the
+2 −2
Original line number Diff line number Diff line
@@ -5685,7 +5685,7 @@ __STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_I2S(uint32_t Source, uint32_t PL
#else
  MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, PLLM);
#endif /* RCC_PLLI2SCFGR_PLLI2SM */
  MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN | RCC_PLLI2SCFGR_PLLI2SR, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos | PLLR << RCC_PLLI2SCFGR_PLLI2SR_Pos);
  MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN | RCC_PLLI2SCFGR_PLLI2SR, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos | PLLR);
}

/**
@@ -5740,7 +5740,7 @@ __STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetQ(void)
  */
__STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetR(void)
{
  return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
  return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SR));
}

#if defined(RCC_PLLI2SCFGR_PLLI2SP)
+0 −8
Original line number Diff line number Diff line
@@ -49,14 +49,6 @@ Patch List:
    ST Bug tracker ID: 13359


   *Add correct shifting to I2SR field in PLLI2SCFGR register
     The I2SR field should be shifted by RCC_PLLI2SCFGR_PLLI2SR_Pos when the PLLI2SCFGR register
     is read or written.
    Impacted files:
     drivers/include/stm32f7xx_ll_rcc.h
    ST Bug tracker ID: 50108


   *Disable new CAN API and enable Legacy API
     A new CAN API has been delivered on recent F7 stm32cube.
     This new API breaks current CAN driver. Disable the new API and enable the
+2 −2
Original line number Diff line number Diff line
@@ -4039,7 +4039,7 @@ __STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_SPDIFRX(uint32_t Source, uint32_
__STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_I2S(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR)
{
  MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM, Source | PLLM);
  MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN | RCC_PLLI2SCFGR_PLLI2SR, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos | PLLR << RCC_PLLI2SCFGR_PLLI2SR_Pos);
  MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN | RCC_PLLI2SCFGR_PLLI2SR, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos | PLLR);
}

/**
@@ -4090,7 +4090,7 @@ __STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetQ(void)
  */
__STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetR(void)
{
  return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SR >> RCC_PLLI2SCFGR_PLLI2SR_Pos));
  return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SR));
}

#if defined(RCC_PLLI2SCFGR_PLLI2SP)